參數(shù)資料
型號: CY7B923-400JI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: HOTLink⑩ Transmitter/Receiver
中文描述: SPECIALTY TELECOM CIRCUIT, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 1/35頁
文件大?。?/td> 629K
代理商: CY7B923-400JI
HOTLink Transmitter/Receiver
CY7B923
CY7B933
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
April 5, 1999
Features
Fibre Channel compliant
IBM ESCON
compliant
DVB-ASI compliant
ATM compliant
8B/10B-coded or 10-bit unencoded
Standard HOTLink: 160–330 Mbps
High Speed HOTLink: 160–400 Mbps for high speed ap-
plications
Low Speed HOTLink: 150–160 Mbps for Low Cost Fiber
applications
TTL synchronous I/O
No external PLL components
Triple PECL 100K serial outputs
Dual PECL 100K serial inputs
Low power: 350 mW (Tx), 650 mW (Rx)
Compatible with fiber-optic modules, coaxial cable, and
twisted pair media
Built-In Self-Test
Single +5V supply
28-pin SOIC/PLCC/LCC
0.8
μ
BiCMOS
Functional Description
The CY7B923 HOTLink Transmitter and CY7B933 HOTLink
Receiver are point-to-point communications building blocks
that transfer data over high-speed serial links (fiber, coax, and
twisted pair). Standard HOTLink data rates range from
160-330 Mbits/second. Higher speed HOTLink is also avail-
able for high speed applications (160-400 Mbits/second), as
well as for those Low Cost applications HOTLink-155 (150-160
Mbits/second operations). Figure 1 illustrates typical connec-
tions to host systems or controllers.
Eight bits of user data or protocol information are loaded into
the HOTLink transmitter and are encoded. Serial data is shift-
ed out of the three differential positive ECL (PECL) serial ports
at the bit rate (which is 10 times the byte rate).
The HOTLink receiver accepts the serial bit stream at its dif-
ferential line receiver inputs and, using a completely integrated
PLL Clock Synchronizer, recovers the timing information nec-
essary for data reconstruction. The bit stream is deserialized,
decoded, and checked for transmission errors. Recovered
bytes are presented in parallel to the receiving host along with
a byte-rate clock.
The 8B/10B encoder/decoder can be disabled in systems that
already encode or scramble the transmitted data. I/O signals
are available to create a seamless interface with both asyn-
chronous FIFOs (i.e., CY7C42X) and clocked FIFOs (i.e.,
CY7C44X). A Built-In Self-Test pattern generator and checker
allows testing of the transmitter, receiver, and the connecting
link as a part of a system diagnostic check.
HOTLink devices are ideal for a variety of applications where
a parallel interface can be replaced with a high-speed
point-to-point serial link. Applications include interconnecting
workstations, servers, mass storage, and video transmission
equipment.
HOTLink is a trademark of cypress Semiconductor Corporation.
ESCON is a registered trademark of IBM.
CY7B923 Transmitter Logic Block Diagram
B923–1
INPUT REGISTER
D
0
7
(D
b
h
)
SC/D(D
a
)
SVS(D
j
)
ENABLE
ENCODER
SHIFTER
OUTA
OUTB
OUTC
FOTO
CKW
CLOCK
GENERATOR
ENA
ENN
RP
TEST
LOGIC
MODE
BISTEN
CY7B933 Receiver LogicBlock Diagram
B923–2
RF
A/B
INA+
INA
INB(INB+)
SI(INB
)
SO
REFCLK
MODE
BISTEN
PECL
TTL
TEST
LOGIC
CLOCK
SYNC
CKR
RDY
SC/D(Q
a
)
RVS(Q
j
)
Q
0
7
(Q
b
h
)
OUTPUT
REGISTER
DECODER
DECODER
REGISTER
SHIFTER
FRAMER
DATA
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