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參數(shù)資料
| 型號： | CY74FCT480ATPC |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Dual 8-Bit Parity Generator/Checker |
| 中文描述： | 雙8位奇偶發(fā)生器/檢查 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 92K |
| 代理商： | CY74FCT480ATPC |
Dual 8-Bit Parity Generator/Checker
CY54/74FCT480T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
SCCS025 - May 1993 - Revised March 2000
Copyright
2000, Texas Instruments Incorporated
1CY54/74FCT480T
Features
Function, pinout and drive compatible with FCT and F
logic
FCT-A speed at 7.5 ns max. (Com’l)
FCT-B speed at 5.6 ns max. (Com’l)
Reduced V
(typically = 3.3V) versions of equivalent
FCT functions
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable feature
Matched rise and fall times
ESD > 2000V
Fully compatible with TTL input and output logic levels
Sink Current
64 mA (Com’l),
32 mA (Mil)
Source Current
32 mA (Com’l),
12 mA (Mil)
Two 8-bit parity generator/checkers
Open drain Active LOW parity error output
Expandable for larger word widths
Functional Description
The
generator/checker. Each parity generator/checker accepts
eight data bits and one parity bit as inputs, and generates a
sum and parity error output. The FCT480T can be used in
ODD parity systems. The parity error output is open-drain,
designed for easy expansion of the word width by a wired-OR
connection of several FCT480T type devices. Since additional
logic is not needed, the parity generation or checking times
remain the same as for an individual FCT480T device.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
FCT480T
is
a
high-speed
dual
8-bit
parity
LogicBlockDiagram
Pin Configurations
FCT480T–1
28
27
26
4
3
2
1
5
6
7
8
9
10
13
14
15
16
17
18
25
24
23
22
21
20
11
12
19
P
F1
H
G
E
H
D
C
N
N
G
E
LCC
Top View
A
1
NC
B
1
CHK/GEN
ODD
1
PAR
2
V
CC
A
2
B
2
ERROR
ODD
2
NC
GND
C
1
F
A
1
B
1
C
1
D
1
E
1
F
1
G
1
H
1
PAR
1
CHK/GEN
ERR
A
2
B
2
C
2
D
2
E
2
F
2
G
2
H
2
PAR
2
ODD
2
ODD
1
FCT480T2
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
24
23
22
21
13
14
A
1
B
1
C
1
D
1
E
1
F
1
G
1
H
1
PAR
1
CHK/GEN
ODD
1
GND
V
CC
A
2
B
2
C
2
D
2
E
2
F
2
G
2
H
2
PAR
2
ERROR
ODD
2
FCT480T3
15
DIP/SOIC/QSOP
Top View
D
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| CY74FCT480ATQCT | Dual 8-Bit Parity Generator/Checker |
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| CY54FCT480 | Dual 8-Bit Parity Generator/Checker |
| CY54FCT480TDIP | Dual 8-Bit Parity Generator/Checker |
| CY54FCT480TLCC | Dual 8-Bit Parity Generator/Checker |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY74FCT480ATPCE4 | 功能描述:奇偶功能 Dual 8B Parity Gen/ Checker RoHS:否 制造商:Texas Instruments 電路數(shù)量:1 位數(shù):9 邏輯系列:74AC 封裝 / 箱體:SOIC-14 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:263 ns 工作電源電壓:1.8 V, 2.5 V, 3.3 V, 5 V 最大工作溫度:+ 70 C 最小工作溫度:- 55 C 封裝:Reel |
| CY74FCT480ATQCT | 功能描述:奇偶功能 Dual 8B Parity Gen/ Checker RoHS:否 制造商:Texas Instruments 電路數(shù)量:1 位數(shù):9 邏輯系列:74AC 封裝 / 箱體:SOIC-14 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:263 ns 工作電源電壓:1.8 V, 2.5 V, 3.3 V, 5 V 最大工作溫度:+ 70 C 最小工作溫度:- 55 C 封裝:Reel |
| CY74FCT480ATQCTE4 | 功能描述:奇偶功能 Dual 8B Parity Gen/ Checker RoHS:否 制造商:Texas Instruments 電路數(shù)量:1 位數(shù):9 邏輯系列:74AC 封裝 / 箱體:SOIC-14 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:263 ns 工作電源電壓:1.8 V, 2.5 V, 3.3 V, 5 V 最大工作溫度:+ 70 C 最小工作溫度:- 55 C 封裝:Reel |
| CY74FCT480ATQCTG4 | 功能描述:奇偶功能 Dual 8B Parity Gen/ Checker RoHS:否 制造商:Texas Instruments 電路數(shù)量:1 位數(shù):9 邏輯系列:74AC 封裝 / 箱體:SOIC-14 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:263 ns 工作電源電壓:1.8 V, 2.5 V, 3.3 V, 5 V 最大工作溫度:+ 70 C 最小工作溫度:- 55 C 封裝:Reel |
| CY74FCT480BTPC | 功能描述:奇偶功能 Dual 8bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:1 位數(shù):9 邏輯系列:74AC 封裝 / 箱體:SOIC-14 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:263 ns 工作電源電壓:1.8 V, 2.5 V, 3.3 V, 5 V 最大工作溫度:+ 70 C 最小工作溫度:- 55 C 封裝:Reel |
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