參數(shù)資料
型號(hào)： CY74FCT191ATSOCT
廠商： Texas Instruments, Inc.
元件分類： 通用總線功能
英文描述： 4-Bit Up/Down Binary Counter
中文描述： 4位向上/向下二進(jìn)制計(jì)數(shù)器
文件頁(yè)數(shù)： 1/6頁(yè)
文件大?。?/td> 61K
代理商： CY74FCT191ATSOCT
4-Bit Up/Down Binary Counter
CY74FCT191T
SCCS016 - May 1994 - Revised February 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
2000, Texas Instruments Incorporated
Features
Function, pinout, and drive compatible with FCT and F
logic
FCT-C speed at 6.2 ns max,
FCT-A speed at 7.8 ns max.
Reduced V
(typically = 3.3V) versions of equivalent
FCT functions
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable permits live insertion
ESD > 2000V
Matched rise and fall times
Sink current
64 mA
Source current
32 mA
Functional Description
The FCT191T is a reversible modulo-16 binary counter,
featuring synchronous counting and asynchronous presetting.
The preset allows the FCT191T to be used in programmable
dividers. The count enable input, terminal count output, and ripple
clock output make possible a variety of methods of implementing
multiusage counters. In the counting modes, state changes are
initiated by the rising edge of the clock.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
CP
RC
Q
0
J
PRESET
Q
CLOCK
K
CLEAR
Q
J
PRESET
Q
CLOCK
K
CLEAR
Q
J
PRESET
Q
CLOCK
K
CLEAR
Q
J
PRESET
Q
CLOCK
K
CLEAR
Q
Q
1
Q
2
Q
3
TC
CE
P
0
P
1
P
2
P
3
PL
U/D
Pin Configurations
1
2
3
4
5
6
7
8
Q
1
Q
0
CE
U/D
Q
2
Q
3
V
CC
P
0
CP
RC
GND
Top View
SOIC/QSOP
16
15
14
13
12
11
10
9
P
1
PL
P
2
P
3
TC
Pin Description
Name
CE
CP
P
PL
U/D
Q
RC
TC
Description
Count Enable Input (Active LOW)
Clock Pulse Input (Active Rising Edge)
Parallel Data Inputs
Asynchronous Parallel Load Input (Active LOW)
Up/Down Count Control Input
Flip-Flop Outputs
Ripple Clock Output (Active LOW)
Terminal Count Output
RC Function Table
[1]
Inputs
Outputs
CE
L
H
X
CP
T
[2]
H
X
L
RC
X
X
H
H
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