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參數(shù)資料
| 型號： | CY74FCT163H245TSSOP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16-Bit Transceivers |
| 中文描述： | 16位收發(fā)器 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 127K |
| 代理商： | CY74FCT163H245TSSOP |
CY74FCT163374
CY74FCT163H374
4
Power Supply Characteristics
Parameter
I
CCD
Description
Test Conditions
Typ.
[5]
50
Max.
75
Unit
μ
A/MHz
Dynamic Power Supply
Current
[11]
V
CC
=Max., One Input Toggling,
50% Duty Cycle,
Outputs Open, OE=GND
V
CC
=Max., f
1
=10 MHz, 50%
Duty Cycle, Outputs Open, One
Bit Toggling, OE=GND
V
IN
=V
CC
or
V
IN
=GND
I
C
Total Power Supply
Current
[12]
V
IN
=V
CC
or
V
IN
=GND
V
IN
=V
CC
–0.6V or
V
IN
=GND
V
IN
=V
CC
or
V
IN
=GND
V
IN
=V
CC
–0.6V or
V
IN
=GND
0.5
0.8
mA
0.5
0.8
mA
V
CC
=Max., f
1
=2.5 MHz, 50%
Duty Cycle, Outputs Open, Six-
teen Bits Toggling, OE=GND
2.0
3.0
[13]
mA
2.0
3.3
[13]
mA
Switching Characteristics
Over the Operating Range
V
CC
=3.0V to 3.6V
[14,15]
Parameter
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
SK(O)
Notes:
11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
12. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
I
C
= I
D
N
(f
/2 + f
N
)
I
CC
= Quiescent Current with CMOS input levels
I
CC
= Power Supply Current for a TTL HIGH input (V
IN
=3.4V)
D
H
= Duty Cycle for TTL inputs HIGH
N
T
= Number of TTL inputs at D
I
CCD
= Dynamic Current caused by an input transition pair (HLH or LHL)
f
0
= Clock frequency for registered devices, otherwise zero
f
1
= Input signal frequency
N
= Number of inputs changing at f
All currents are in milliamps and all frequencies are in megahertz.
13. Values for these conditions are examples of the I
formula. These limits are specified but not tested.
14. Minimum limits are specified but not tested on Propagation Delays.
15. For V
=2.7, propagation delay, output enable and output disable times should be degraded by 20%.
16. See “Parameter Measurement Information” in the General Information section.
17. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Description
CY74FCT163374A
CY74FCT163H374A
Min.
1.5
CY74FCT163374C
CY74FCT163H374C
Min.
1.5
Max.
6.5
Max.
5.2
Unit
ns
Fig. No.
[16]
1, 3
PropagationDelayClockto
Output
Output Enable Time
1.5
6.5
1.5
5.5
ns
1, 7, 8
Output Disable Time
1.5
5.5
1.5
5.0
ns
1, 7, 8
Input Setup time
Input Hold time
Output Skew
[17]
2.0
1.5
2.0
1.5
ns
ns
ns
1, 4
1. 4
—
-
-
0.5
0.5
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| CY74FCT163H374SSOP | 16-Bit Registers |
| CY74FCT163H374TSSOP | 16-Bit Registers |
| CY74FCT163H952TSSOP | 16-Bit Registered Transceivers |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY74FCT163H374 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Registers |
| CY74FCT163H374CPAC | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Registers |
| CY74FCT163H374CPVC | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Registers |
| CY74FCT163H374SSOP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Registers |
| CY74FCT163H374TSSOP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Registers |
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