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參數(shù)資料
| 型號： | CY62148DV30LL |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 4-Mbit (512K x 8) MoBL㈢ Static RAM |
| 中文描述： | 4兆位（為512k × 8）的MoBL㈢靜態(tài)RAM |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 529K |
| 代理商： | CY62148DV30LL |
4-Mbit (512K x 8) MoBL
Static RAM
CY62148DV30
Cypress Semiconductor Corporation
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Document #: 38-05341 Rev. *D
Revised January 25, 2007
Features
Temperature Ranges
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
Very high speed: 55 ns
— Wide voltage range: 2.20V – 3.60V
Pin-compatible with CY62148CV25, CY62148CV30 and
CY62148CV33
Ultra low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 8 mA @ f = f
max
(55-ns speed)
Ultra low standby power
Easy memory expansion with CE, and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
Available in Pb-free and non Pb-free 36-ball VFBGA,
Pb-free 32-pin TSOPII and 32-pin SOIC packages
Functional Description
[1]
The CY62148DV30 is a high-performance CMOS static RAM
organized as 512K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life (MoBL
) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption. The device can be put into
standby mode reducing power consumption when deselected
(CE HIGH).The eight input and output pins (IO
0
through IO
7
)
are placed in a high-impedance state when:
Deselected (CE HIGH)
Outputs are disabled (OE HIGH)
When the write operation is active(CE LOW and WE LOW)
Write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. Data on the eight IO pins (IO
0
through IO
7
) is then written into the location specified on the
address pins (A
0
through A
18
).
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins will appear on the IO pins.
Logic Block Diagram
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
COLUMN
R
S
Data in Drivers
POWER
DOWN
WE
OE
IO
0
IO
1
IO
2
IO
3
512K x 8
ARRAY
IO
7
IO
6
IO
5
IO
4
A
0
A
1
CE
A
1
A
1
A
1
A
1
A
1
Note:
1. For best practice recommendations, refer to the Cypress application note “
System Design Guidelines
” on
http://www.cypress.com.
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| CY62148DV30LL-55BVI | 4-Mbit (512K x 8) MoBL㈢ Static RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62148DV30LL-55BVI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512K x 8) MoBL? Static RAM |
| CY62148DV30LL-55BVXI | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY62148DV30LL-55SXI | 功能描述:靜態(tài)隨機(jī)存取存儲器 SLO 3.0V SUPER LO PWR 512KX8 靜態(tài)隨機(jī)存取存儲器 IND RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62148DV30LL-55SXIT | 功能描述:靜態(tài)隨機(jī)存取存儲器 SLO 3.0V SUPER LO PWR 512KX8 靜態(tài)隨機(jī)存取存儲器 IND RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62148DV30LL-55ZSXI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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