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參數(shù)資料
| 型號(hào)： | CY62138VLL-70BAI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 256K x 8 Static RAM |
| 中文描述： | 256K X 8 STANDARD SRAM, 70 ns, PBGA48 |
| 封裝： | 7 X 7 MM, 1.20 MM HEIGHT, FBGA-48 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 175K |
| 代理商： | CY62138VLL-70BAI |
CY7C1020
5
Switching Waveforms
Notes:
8.
9.
10. Address valid prior to or coincident with CE transition LOW.
Device is continuously selected. OE, CE, BHE and/or BHE = V
IL
.
WE is HIGH for read cycle.
Read Cycle No. 1
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
1020-5
ADDRESS
DATA OUT
[8, 9]
Read Cycle No. 2(OEControlled)
1020-6
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZBE
t
PD
HIGH
OE
CE
ICC
I
I
SB
IMPEDANCE
ADDRESS
DATA OUT
V
CC
SUPPLY
CURRENT
t
DBE
t
LZBE
t
HZCE
BHE, BLE
[9, 10]
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