參數(shù)資料
型號(hào)： CY62137VLL-55ZXI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： DRAM
英文描述： 2-Mbit (128K x 16) Static RAM
中文描述： 128K X 16 STANDARD SRAM, 55 ns, PDSO44
封裝： LEAD FREE, TSOP2-44
文件頁(yè)數(shù)： 1/11頁(yè)
文件大小： 282K
代理商： CY62137VLL-55ZXI
2-Mbit (128K x 16) Static RAM
CY62137V MoBL
Cypress Semiconductor Corporation
Document #: 38-05051 Rev. *E
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised July 19, 2006
Features
High Speed
— 55 ns
Temperature Ranges
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
Wide voltage range: 2.7V – 3.6V
Ultra-low active, standby power
Easy memory expansion with CE and OE features
TTL-compatible inputs and outputs
Automatic power-down when deselected
CMOS for optimum speed/power
Available in Pb-free and non Pb-free standard
44-pin TSOP Type II package
Functional Description
[1]
The CY62137V is a high-performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life (MoBL
) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that reduces power
consumption by 99% when addresses are not toggling. The
device can also be put into standby mode when deselected
(CE HIGH) or when CE is LOW and both BLE and BHE are
HIGH. The input/output pins (I/O
0
through I/O
15
) are placed in
a high-impedance state when: deselected (CE HIGH), outputs
are disabled (OE HIGH), BHE and BLE are disabled (BHE,
BLE HIGH), or during a write operation (CE LOW, and WE
LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through A
16
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
0
to I/O
7
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
8
to I/O
15
. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
Logic Block Diagram
128K x 16
RAM Array
I/O
0
–I/O
7
R
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
COLUMN DECODER
A
1
A
1
A
1
A
1
A
1
S
DATA IN DRIVERS
OE
BLE
I/O
8
–I/O
15
CE
WE
BHE
A
1
A
0
A
9
Power - Down
Circuit
BLE
A
10
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com
CE
BHE
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CY62137VLL-70BAI 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述:Static RAM, 128Kx16, 48 Pin, Plastic, BGA
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CY62137VLL-70ZSXE 功能描述:IC SRAM 2MBIT 70NS 44TSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:MoBL® 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱(chēng):557-1327-2
CY62137VLL-70ZSXET 功能描述:IC SRAM 2MBIT 70NS 44TSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:MoBL® 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱(chēng):557-1327-2
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