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參數(shù)資料
| 型號： | CY62137V |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 2-Mbit (128K x 16) Static RAM |
| 中文描述： | 2兆位（128K的× 16）靜態(tài)RAM |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 214K |
| 代理商： | CY62137V |
CY62137V MoBL
Document #: 38-05051 Rev. *B
Page 2 of 11
Pin Configurations
Product Portfolio
Product
V
CC
Range (V)
Typ.
[3]
3.0
Speed
(ns)
55
55
70
70
70
Power Dissipation
Operating, I
CC
(mA)
Typ.
[3]
Max.
7
20
7
20
7
15
7
15
7
15
Standby, I
SB2
(
μ
A)
Typ.
[3]
1
1
1
1
1
Min.
2.7
Max.
3.6
Max.
15
5
15
5
20
CY62137VLL
CY62137VSL
CY62137VLL
CY62137VSL
CY62137VLL
Industrial
Automotive
WE
A
16
A
15
A
14
A
13
A
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
31
30
32
36
35
34
33
37
40
39
38
Top View
TSOP II (Forward)
41
44
43
42
16
17
29
28
V
CC
V
SS
I/O
4
I/O
5
A
4
A
3
A
2
A
1
A
0
OE
BHE
BLE
V
SS
V
CC
I/O
11
I/O
10
I/O
9
I/O
8
A
5
A
6
A
7
I/O
15
I/O
14
I/O
13
I/O
12
CE
I/O
0
I/O
1
I/O
2
I/O
3
NC
A
8
A
9
A
10
A
11
18
19
20
21
27
26
25
24
22
23
NC
I/O
6
I/O
7
Pin Definitions
Pin Number
Type
Description
1-5, 18-22, 24-27, 42-45
Input
A
0
-A
16
. Address Inputs
I/O
0
-I/O
15
. Data lines. Used as input or output lines depending on operation
NC
. This pin is not connected to the die
7-10, 13-16, 29-32, 35-38 Input/Output
23
No Connect
17
Input/Control
WE
. When selected LOW, a WRITE is conducted. When selected HIGH, a READ
is conducted
6
Input/Control
CE
. When LOW, selects the chip. When HIGH, deselects the chip
39, 40
Input/Control
BHE
,
BLE
. BHE = LOW selects higher order byte WRITEs or READs on the
SRAM.BLE = LOW selects lower order byte WRITEs or READs on the SRAM
41
Input/Control
OE
. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins
behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as
input data pins
12, 34
Ground
Vss
. Ground for the device
11, 33
Power Supply
Vcc
. Power supply for the device
Notes:
2.
3.
NC pins are not connected on the die.
Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(TYP)
., T
A
= 25°C.
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PDF描述 |
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| CY62137VLL-55ZI | 2-Mbit (128K x 16) Static RAM |
| CY62137VLL-70ZE | 2-Mbit (128K x 16) Static RAM |
| CY62137VLL-70ZI | 2-Mbit (128K x 16) Static RAM |
| CY62137VSL-55ZI | 2-Mbit (128K x 16) Static RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62137V_06 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (128K x 16) Static RAM |
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| CY62137VLL-55BAI | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 3V 2M-Bit 128K x 16 55ns 48-Pin FBGA |
| CY62137VLL-55ZI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (128K x 16) Static RAM |
| CY62137VLL-55ZXI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (128K x 16) Static RAM |
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