- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378485 > CY62135V18 (Cypress Semiconductor Corp.) 128K x 16 Flash Compatible Static RAM(128K x 16 閃速兼容的靜態(tài)RAM) PDF資料下載
參數(shù)資料
| 型號： | CY62135V18 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 128K x 16 Flash Compatible Static RAM(128K x 16 閃速兼容的靜態(tài)RAM) |
| 中文描述： | 128K的閃存兼容× 16靜態(tài)RAM（128K的× 16閃速兼容的靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 128K |
| 代理商： | CY62135V18 |
128K x 16 Flash Compatible Static RAM
BHE are HIGH
[1]
. The input/output pins (I/O
0
through I/O
15
)
are placed in a high-impedance state when: deselected (CE
HIGH or CE2 LOW), outputs are disabled (OE HIGH), BHE
and BLE are disabled (BHE, BLE HIGH), or during a write
operation (CE LOW, CE2 HIGH and WE LOW).
Writing to the device is accomplished by taking chip enable
(CE) LOW, CE2 HIGH, and write enable (WE) inputs LOW. If
byte low enable (BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is written into the location specified on the ad-
dress pins (A
0
through A
16
). If byte high enable (BHE) is LOW,
then data from I/O pins (I/O
8
through I/O
15
) is written into the
location specified on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking chip en-
able (CE) LOW, CE2 HIGH, and output enable (OE) LOW
while forcing the write enable (WE) HIGH. If byte low enable
(BLE) is LOW, then data from the memory location specified
by the address pins will appear on I/O
0
to I/O
7
. If byte high
enable (BHE) is LOW, then data from memory will appear on
I/O
8
to I/O
15
. See the Truth Table at the back of this data sheet
for a complete description of read and write modes.
The CY62135V/CY62135V18 are shipped in a wafer form.
CY62135V MoBL
CY62135V18 MoBL2
PRELIMINARY
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
December 21, 1999
Features
Low voltage range:
—CY62135V: 2.7V–3.3V
—CY62135V18: 1.65–1.95V
Ultra-low active/standby power
Easy memory expansion with CE
/CE2
and OE features
Automatic power-down when deselected
Pin out compatible with standard Flash devices
Shipped in Wafer/Die form
Functional Description
The CY62135V and CY62135V18 are high-performance
CMOS static RAMs organized as 128K words by 16 bits. This
device features advanced circuit design to provide ultra-low
active current. This is ideal for providing More Battery Life
(MoBL) in portable applications such as cellular telephones.
The device also has an automatic power-down feature that
significantly reduces power consumption by 99% when ad-
dresses are not toggling. The device can also be put into
standby mode when deselected (CE HIGH or CE2 LOW) or
when CE is LOW and when CE2 is HIGH and both BLE and
Note:
1.
More Battery Life and MoBL are trademarks of Cypress Semiconductor Corporation.
Tying BBDISB to V
CC
will disable the Byte Enable Power Down Feature. Tying it to V
SS
will enable the Byte Enable Power Down Feature.
Logic Block Diagram
128K x 16
RAM Array
1024 X 2048
I/O
0
–I/O
7
R
A
8
A
7
A
6
A
3
A
2
A
1
A
0
COLUMN DECODER
A
1
A
1
A
1
A
1
A
1
S
DATA IN DRIVERS
OE
BLE
I/O
8
–I/O
15
WE
BHE
A
1
A
1
Power-Down
Circuit
BHE
BLE
CE
CE2
A
9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY62136CV | 2-Mbit (128K x 16) Static RAM |
| CY62136VLL-55ZI | 128K x 16 Static RAM |
| CY62136VLL-70BAI | 128K x 16 Static RAM |
| CY62136VLL-70ZI | 128K x 16 Static RAM |
| CY62136VLL | 128K x 16 Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62136BV18 WAF | 制造商:Cypress Semiconductor 功能描述: |
| CY62136BV18LL-70BAI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM |
| CY62136CV | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2M (128K x 16) Static RAM |
| CY62136CV18 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:128K x 16 Static RAM |
| CY62136CV18LL-55BAI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:128K x 16 Static RAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。