參數資料
型號: CY62128ELL
廠商: Cypress Semiconductor Corp.
英文描述: 1-Mbit (128K x 8) Static RAM
中文描述: 1兆位(128K的× 8)靜態(tài)RAM
文件頁數: 3/11頁
文件大小: 862K
代理商: CY62128ELL
Document #: 38-05485 Rev. *E
Page 3 of 11
CY62128E MoBL
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground
Potential...............................–0.5V to 6.0V (V
CC(max)
+ 0.5V)
DC Voltage Applied to Outputs
in High-Z State
[5, 6]
...............–0.5V to 6.0V (V
CC(max)
+ 0.5V)
DC Input Voltage
[5, 6]
...........–0.5V to 6.0V (V
CC(max)
+ 0.5V)
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage...........................................> 2001V
(MIL-STD-883, Method 3015)
Latch up Current.....................................................> 200 mA
Operating Range
Device
Range
Ambient
Temperature
–40°C to +85°C 4.5V to 5.5V
–40°C to +125°C
V
CC
[7]
CY62128ELL
Ind’l/Auto-A
Auto-E
Electrical Characteristics
(Over the Operating Range)
Parameter
Description
Test Conditions
45 ns (Ind’l/Auto-A)
Typ
[3]
55 ns (Auto-E)
Typ
[3]
Unit
Min
Max
Min
Max
V
OH
Output HIGH
Voltage
I
OH
= –1 mA
2.4
2.4
V
V
OL
Output LOW
Voltage
I
OL
= 2.1 mA
0.4
0.4
V
V
IH
V
IL
I
IX
Input HIGH Voltage V
CC
= 4.5V to 5.5V
Input LOW voltage V
CC
= 4.5V to 5.5V
Input Leakage
Current
2.2
V
CC
+ 0.5
0.8
2.2
V
CC
+ 0.5
0.8
V
–0.5
–0.5
V
μ
A
GND < V
I
< V
CC
–1
+1
–4
+4
I
OZ
Output Leakage
Current
GND < V
O
< V
CC
, Output Disabled
–1
+1
–4
+4
μ
A
I
CC
V
CC
Operating
Supply Current
f = f
max
= 1/t
RC
V
CC
= V
CC(max)
f = 1 MHz
I
OUT
= 0 mA
CMOS levels
11
16
11
35
mA
1.3
2
1.3
4
I
SB2 [8]
Automatic CE
Power down
Current—CMOS
Inputs
CE
1
> V
CC
– 0.2V or CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V,
f = 0, V
CC
= V
CC(max)
1
4
1
30
μ
A
Capacitance
(For all Packages)
[9]
Parameter
Description
Test Conditions
Max
10
10
Unit
pF
pF
C
IN
C
OUT
Input Capacitance
Output Capacitance
T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
Notes
5. V
IL(min)
= –2.0V for pulse durations less than 20 ns.
6. V
= V
+ 0.75V for pulse durations less than 20 ns.
7. Full device AC operation assumes a 100
μ
s ramp time from 0 to V
(min) and 200
μ
s wait time after V
stabilization.
8. Only chip enables (CE
and CE
) must be at CMOS level to meet the I
/ I
spec. Other inputs can be left floating.
9. Tested initially and after any design or process changes that may affect these parameters.
[+] Feedback
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CY62128ELL45SXI 制造商:Cypress Semiconductor 功能描述:
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