參數(shù)資料
型號(hào)： CY39200V484-83BGC
廠商： Cypress Semiconductor Corp.
英文描述： CPLDs at FPGA Densities
中文描述： CPLD器件在FPGA的密度
文件頁(yè)數(shù)： 38/86頁(yè)
文件大?。?/td> 1235K
代理商： CY39200V484-83BGC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 38 of 86
Delta39K Part Numbers (Ordering Information)
Device
39K30
Speed
(MHz)
233
Ordering Code
CY39030V208-233NTC
CY39030V256-233BBC
CY39030V256-233MBC
CY39030V208-125NTC
CY39030V256-125BBC
CY39030V256-125MBC
CY39030V208-125NTI
CY39030V256-125BBI
CY39030V208-83NTC
CY39030V256-83BBC
CY39030V256-83MBC
CY39030V208-83NTI
CY39030V256-83BBI
CY39050V208-233NTC
CY39050V256-233BBC
CY39050V388-233MGC
CY39050V484-233MBC
CY39050V208-125NTC
CY39050V256-125BBC
CY39050V388-125MGC
CY39050V484-125MBC
CY39050V208-125NTI
CY39050V256-125BBI
CY39050V208-83NTC
CY39050V256-83BBC
CY39050V388-83MGC
CY39050V484-83MBC
CY39050V208-83NTI
CY39050V256-83BBI
CY39100V208B-200NTC
CY39100V256B-200BBC
CY39100V484B-200BBC
CY39100V388B-200MGC
CY39100V676B-200MBC
Package
Name
NT208
BB256
MB256
NT208
BB256
MB256
NT208
BB256
NT208
BB256
MB256
NT208
BB256
NT208
BB256
MG388
MB484
NT208
BB256
MG388
MB484
NT208
BB256
NT208
BB256
MG388
MB484
NT208
BB256
NT208
BB256
BB484
MG388
MB676
Package Type
Self-Boot
Solution
Operating
Range
Commercial
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
256-Lead Fine Pitch Ball Grid Array
208-Lead Plastic Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
388-Lead Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Plastic Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
÷
125
÷
Industrial
83
Commercial
÷
Industrial
39K50
233
Commercial
÷
÷
125
÷
÷
39K50
125
Industrial
83
Commercial
÷
÷
Industrial
39K100
200
Commercial
÷
÷
相關(guān)PDF資料
PDF描述
CY39200V484-83BGI CPLDs at FPGA Densities
CY39200V484-83MBC CPLDs at FPGA Densities
CY39200V484-83MBI CPLDs at FPGA Densities
CY39200V484-83MGC CPLDs at FPGA Densities
CY39200V484-83MGI CPLDs at FPGA Densities
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY39200V676-125MBXC 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Delta39K 200K 125MHz COM RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
CY39200V676-181MBC 制造商:Cypress Semiconductor 功能描述:
CY39200V676-181MBXC 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Delta39K 200K 181MHz COM RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
CY39200V676-83MBXC 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Delta39K 200K 83MHz COM RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
CY39200Z208-125BBC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
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