參數(shù)資料
型號： CY39200V256-181NI
廠商： Cypress Semiconductor Corp.
英文描述： CPLDs at FPGA Densities
中文描述： CPLD器件在FPGA的密度
文件頁數(shù)： 38/86頁
文件大?。?/td> 1235K
代理商： CY39200V256-181NI
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 38 of 86
Delta39K Part Numbers (Ordering Information)
Device
39K30
Speed
(MHz)
233
Ordering Code
CY39030V208-233NTC
CY39030V256-233BBC
CY39030V256-233MBC
CY39030V208-125NTC
CY39030V256-125BBC
CY39030V256-125MBC
CY39030V208-125NTI
CY39030V256-125BBI
CY39030V208-83NTC
CY39030V256-83BBC
CY39030V256-83MBC
CY39030V208-83NTI
CY39030V256-83BBI
CY39050V208-233NTC
CY39050V256-233BBC
CY39050V388-233MGC
CY39050V484-233MBC
CY39050V208-125NTC
CY39050V256-125BBC
CY39050V388-125MGC
CY39050V484-125MBC
CY39050V208-125NTI
CY39050V256-125BBI
CY39050V208-83NTC
CY39050V256-83BBC
CY39050V388-83MGC
CY39050V484-83MBC
CY39050V208-83NTI
CY39050V256-83BBI
CY39100V208B-200NTC
CY39100V256B-200BBC
CY39100V484B-200BBC
CY39100V388B-200MGC
CY39100V676B-200MBC
Package
Name
NT208
BB256
MB256
NT208
BB256
MB256
NT208
BB256
NT208
BB256
MB256
NT208
BB256
NT208
BB256
MG388
MB484
NT208
BB256
MG388
MB484
NT208
BB256
NT208
BB256
MG388
MB484
NT208
BB256
NT208
BB256
BB484
MG388
MB676
Package Type
Self-Boot
Solution
Operating
Range
Commercial
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
256-Lead Fine Pitch Ball Grid Array
208-Lead Plastic Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
388-Lead Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Plastic Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
÷
125
÷
Industrial
83
Commercial
÷
Industrial
39K50
233
Commercial
÷
÷
125
÷
÷
39K50
125
Industrial
83
Commercial
÷
÷
Industrial
39K100
200
Commercial
÷
÷
相關PDF資料
PDF描述
CY39200V256-181NTC CPLDs at FPGA Densities
CY39200V256-181NTI CPLDs at FPGA Densities
CY39200V256-200BBC CPLDs at FPGA Densities
CY39200V256-200BBI CPLDs at FPGA Densities
CY39200V256-200BGC CPLDs at FPGA Densities
相關代理商/技術參數(shù)
參數(shù)描述
CY39200V256-200MGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V256-233MGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V256-233MGI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V256-233NTC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-125MGC 功能描述:IC CPLD 200K GATE 388-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復雜可編程邏輯器件） 系列:Delta 39K™ ISR™ 標準包裝:40 系列:ispMACH® 4000C 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時間 tpd(1):5.0ns 電壓電源 - 內(nèi)部:1.65 V ~ 1.95 V 邏輯元件/邏輯塊數(shù)目:32 宏單元數(shù):512 門數(shù):- 輸入/輸出數(shù):128 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:176-LQFP 供應商設備封裝:176-TQFP（24x24） 包裝:托盤
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