
Ultra37000 CPLD Family
Document #: 38-03007 Rev. *C
Page 28 of 62
Typical 3.3V Power Consumption
CY37032V
CY37512
Typical 5.0V Power Consumption
(continued)
0
100
200
300
400
500
600
0
20
40
60
80
100
120
140
160
Frequency (MHz)
I
Low Power
High Speed
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V
CC
= 5.0V, T
A
= Room Temperature
0
5
10
15
20
25
30
0
20
40
60
80
100
120
140
160
Frequency (MHz)
I
Low Power
High Speed
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V
CC
= 3.3V, T
A
= Room Temperature