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參數(shù)資料
| 型號(hào)： | CY3686 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | EZ-USB NX2LP-Flex⑩ Flexible USB NAND Flash Controller |
| 中文描述： | 的EZ - USB NX2LP - flex的⑩靈活的USB NAND閃存控制器 |
| 文件頁(yè)數(shù)： | 1/33頁(yè) |
| 文件大?。?/td> | 882K |
| 代理商： | CY3686 |
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EZ-USB NX2LP-Flex Flexible USB NAND Flash Controller
CY7C68033/CY7C68034
Cypress Semiconductor Corporation
Document #: 001-04247 Rev. *D
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised September 21, 2006
CY7C68033/CY7C68034 Silicon Features
Certified compliant for Bus- or Self-powered USB 2.0
operation (TID# 40490118)
Single-chip, integrated USB 2.0 transceiver and smart SIE
Ultra low power – 43 mA typical current draw in any mode
Enhanced 8051 core
— Firmware runs from internal RAM, which is downloaded
from NAND flash at startup
— No external EEPROM required
15 KBytes of on-chip Code/Data RAM
— Default NAND firmware ~8 kB
— Default free space ~7 kB
Four programmable BULK/INTERRUPT/ISOCHRONOUS
endpoints
— Buffering options: double, triple, and quad
Additional programmable (BULK/INTERRUPT) 64-byte
endpoint
SmartMedia Standard Hardware ECC generation with 1-bit
correction and 2-bit detection
GPIF (General Programmable Interface)
— Allows direct connection to most parallel interfaces
— Programmable waveform descriptors and configuration
registers to define waveforms
— Supports multiple Ready (RDY) inputs and Control (CTL)
outputs
12 fully-programmable GPIO pins
Integrated, industry-standard enhanced 8051
— 48-MHz, 24-MHz, or 12-MHz CPU operation
— Four clocks per instruction cycle
— Three counter/timers
— Expanded interrupt system
— Two data pointers
3.3V operation with 5V tolerant inputs
Vectored USB interrupts and GPIF/FIFO interrupts
Separate data buffers for the Set-up and Data portions of a
CONTROL transfer
Integrated I
2
C controller, runs at 100 or 400 kHz
Four integrated FIFOs
— Integrated glue logic and FIFOs lower system cost
— Automatic conversion to and from 16-bit buses
— Master or slave operation
— Uses external clock or asynchronous strobes
— Easy interface to ASIC and DSP ICs
Available in space saving, 56-pin QFN package
CY7C68034 Only Silicon Features:
Ideal for battery powered applications
— Suspend current: 100
μ
A (typ.)
CY7C68033 Only Silicon Features:
Ideal for non-battery powered applications
— Suspend current: 300
μ
A (typ.)
x20
PLL
/0.5
/1.0
/2.0
8051 Core
12/24/48 MHz,
four clocks/cycle
V
CC
1.5k
D+
D–
A
GPIF
CY
Smart
USB
1.1/2.0
Engine
USB
2.0
XCVR
Additional I/Os
CTL (3)
8/16
ECC
NAND
Boot Logic
(ROM)
NX2LP-Flex
24 MHz
Ext. Xtal
Connected for
full-speed USB
Integrated full- and
high-speed XCVR
15 kB
RAM
General Programmable
I/F to ASIC/DSP or bus
standards such as 8-bit
NAND, EPP, etc.
4 kB
FIFO
Up to 96 MB/s burst rate
High-performance,
enhanced 8051 core
with low power options
‘Soft Configuration’ enables
easy firmware changes
FIFO and USB endpoint memory
(master or slave modes)
Enhanced USB core
simplifies 8051 code
I
2
C
Master
Block Diagram
[+] Feedback
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