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參數(shù)資料
| 型號： | CY3670 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Single-PLL General-Purpose EPROM Programmable Clock Generator |
| 中文描述： | 單鎖相環(huán)通用EPROM的可編程時鐘發(fā)生器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 118K |
| 代理商： | CY3670 |
CY2071A
Single-PLL General-Purpose
EPROM Programmable Clock Generator
Cypress Semiconductor Corporation
Document #: 38-07139 Rev. *A
3901 North First Street
San Jose
CA 95134
Revised December 14, 2002
408-943-2600
i
Selector Guide
Features
Benefits
Single phase-locked loop architecture
EPROM programmability
Factory-programmable (CY2071A, CY2071AI) or field-
programmable (CY2071AF, CY2071AFI) device options
Up to three configurable outputs
Low-skew, low-jitter, high-accuracy outputs
Internal loop filter
Power management (OE)
Frequency select options
Configurable 5V or 3.3V operation
8-pin 150-mil SOIC package
Generates a custom frequency from an external source
Easy customization and fast turnaround
Programming support available for all opportunities
Generates three related frequencies from a single device
Meets critical industry standard timing requirements
Alleviates the need for external components
Supports low-power applications
3 outputs with 2 user selectable frequencies
Supports industry standard design platforms
Industry-standard packaging saves on board space
Part Number
CY2071A
Outputs
3
Input Frequency Range
10 MHz
–
25 MHz (external crystal)
1 MHz
–
30 MHz (reference clock)
10 MHz
–
25 MHz (external crystal)
1 MHz
–
30 MHz (reference clock)
10 MHz
–
25 MHz (external crystal)
1 MHz
–
30 MHz (reference clock)
10 MHz
–
25 MHz (external crystal)
1 MHz
–
30 MHz (reference clock)
Output Frequency Range
500 kHz
–
130 MHz (5V)
500 kHz
–
100 MHz (3.3V)
500 kHz
–
100 MHz (5V)
500 kHz
–
80 MHz (3.3V)
500 kHz
–
100 MHz (5V)
500 kHz
–
80 MHz (3.3V)
500 kHz
–
90 MHz (5V)
500 kHz
–
66.6 MHz (3.3V)
Specifics
Factory Programmable
Commercial Temperature
Factory Programmable
Industrial Temperature
Field Programmable
Commercial Temperature
Field Programmable
Industrial Temperature
CY2071AI
3
CY2071AF
3
CY2071AFI
3
1
2
3
4
5
8
7
6
CLKA
GND
XTALIN
XTALOUT
VDD
CLKC
CLKB
OE/FS
XTALOUT
XTALIN
REFERENCE
OSCILLATOR
PLL
Block
CLKA
CLKB
CLKC
EPROM-
Configurable
Multiplexer
and Divide
Logic
OE / FS
Logic Block Diagram for CY2071A
Top View
8-pin SOIC
Pin Configuration
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