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參數(shù)資料
| 型號： | CY2SSTV857ZXI-32T |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK DDR266/333BUF1:10 48TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | * |
| 類型： | * |
| PLL： | * |
| 主要目的： | * |
| 輸入： | * |
| 輸出： | * |
| 電路數(shù)： | * |
| 比率 - 輸入:輸出： | * |
| 差分 - 輸入:輸出： | * |
| 頻率 - 最大： | * |
| 電源電壓： | * |
| 工作溫度： | * |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
CY2SSTV85
.......................... Document #: 38-07557 Rev. *E Page 8 of 8
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized appli-
cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Package Drawing and Dimension
1.100[0.043]
0.051[0.002]
0.851[0.033]
SEATING
PLANE
1
24
0.508[0.020]
0.500[0.019]
7.950[0.313]
0.25[0.010]
6.198[0.244]
12.395[0.488]
8.255[0.325]
5.994[0.236]
0.950[0.037]
0.500[0.020]
BSC
12.598[0.496]
0.152[0.006]
0.762[0.030]
0°-8°
DIMENSIONS IN MM[INCHES] MIN.
MAX.
0.170[0.006]
0.279[0.011]
GAUGE PLANE
0.20[0.008]
25
48
0.100[0.003]
0.200[0.008]
REFERENCE JEDEC MO-153
PACKAGE WEIGHT 0.33gms
PART #
Z4824 STANDARD PKG.
ZZ4824 LEAD FREE PKG.
48-lead (240-mil) TSSOP II Z4824
0.60[0.024]
5.70[0.224]
5.90[0.232]
A
C
1.00[0.039] MAX.
N
SEATING
PLANE
N
2
0.18[0.007]
0.50[0.020]
1
0.08[0.003]
0.50[0.020]
0.05[0.002] MAX.
2
(4X)
C
0.24[0.009]
0.20[0.008] REF.
0.80[0.031] MAX.
PIN1 ID
0°-12°
4.45[0.175]
6.10[0.240]
5.80[0.228]
4.55[0.179]
0.45[0.018]
0.20[0.008] R.
DIA.
0.28[0.011]
0.30[0.012]
0.60[0.024]
5.90[0.232]
5.80[0.228]
5.70[0.224]
6.10[0.240]
4.55[0.179]
4.45[0.175]
TOP VIEW
BOTTOM VIEW
SIDE VIEW
E-PAD
(PAD SIZE VARY
BY DEVICE TYPE)
40-lead QFN 6 x 6 MM LF40A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2V012FLXCT | 制造商:Cypress Semiconductor 功能描述: |
| CY2V013FLXCT | 功能描述:鎖相環(huán) - PLL IC XTAL OSC VOLT RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY2V013FLXIT | 功能描述:鎖相環(huán) - PLL FleXo HiPerf ClkGen RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY2V014FLXCT | 功能描述:鎖相環(huán) - PLL IC XTAL OSC VOLT RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY2V014FLXIT | 功能描述:鎖相環(huán) - PLL FleXo HiPerf ClkGen RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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