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參數(shù)資料
| 型號： | CY2SSTV855ZXIT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 6/6頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK DIFFDRV PLL DDR 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | * |
| 類型： | * |
| PLL： | * |
| 主要目的： | * |
| 輸入： | * |
| 輸出： | * |
| 電路數(shù)： | * |
| 比率 - 輸入:輸出： | * |
| 差分 - 輸入:輸出： | * |
| 頻率 - 最大： | * |
| 電源電壓： | * |
| 工作溫度： | * |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
CY2SSTV85
......................... Document #: 38-07459 Rev. *F Page 6 of 6
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Sil-
icon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or
parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, repre-
sentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized appli-
cation, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Package Drawing and Dimensions
tPLH
Low-to-High Propagation Delay,
CLKINT to YT[0:3]
1.5
3.5
6
ns
tPHL
High-to-Low Propagation Delay,
CLKINT to YT[0:3]
1.5
3.5
6
ns
tSK(0)
Any Output to Any Output Skew[14]
––
100
ps
t()
Static Phase Offset[14]
–450
–
450
ps
tD()
Dynamic Phase Offset
f > 66 MHz
–350
–
350
ps
AC Electrical Specifications (AVDD = VDDQ = 2.5V±5%, TA = –40°C to +85°C)
[10, 11] (continued)
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
Ordering Information
Part Number
Package Type
Product Flow
CY2SSTV855ZC
28-pin TSSOP
Commercial, 0
to 70C
CY2SSTV855ZCT
28-pin TSSOP – Tape and Reel
Commercial, 0
to 70C
CY2SSTV855ZI
28-pin TSSOP
Industrial, –40
to 85C
CY2SSTV855ZIT
28-pin TSSOP – Tape and Reel
Industrial,–40
to 85C
Lead Free
CY2SSTV855ZXC
28-pin TSSOP
Commercial, 0
to 70C
CY2SSTV855ZXCT
28-pin TSSOP – Tape and Reel
Commercial, 0
to 70C
CY2SSTV855ZXI
28-pin TSSOP
Industrial, –40
to 85C
CY2SSTV855ZXIT
28-pin TSSOP – Tape and Reel
Industrial,–40
to 85C
PIN 1 ID
SEATING
PLANE
BSC.
BSC
0°-8°
PLANE
GAUGE
1
28
9.60[0.378]
1.10[0.043] MAX.
0.65[0.025]
0.20[0.008]
0.05[0.002]
6.50[0.256]
0.076[0.003]
6.25[0.246]
4.50[0.177]
4.30[0.169]
9.80[0.386]
0.15[0.006]
0.19[0.007]
0.30[0.012]
0.09[[0.003]
0.25[0.010]
0.70[0.027]
0.50[0.020]
0.95[0.037]
0.85[0.033]
DIMENSIONS IN MM[INCHES] MIN.
MAX.
REFERENCE JEDEC MO-153
PACKAGE WEIGHT 0.16 gms
PART #
Z28.173 STANDARD PKG.
ZZ28.173 LEAD FREE PKG.
28-Lead Thin Shrunk Small Outline Package (4.40-mm Body) Z28.173
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