參數(shù)資料
型號(hào)： CY28339ZC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： XO, clock
英文描述： Intel CK408 Mobile Clock Synthesizer
中文描述： 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝： 0.240 INCH, TSSOP2-48
文件頁(yè)數(shù)： 3/18頁(yè)
文件大小： 224K
代理商： CY28339ZC
CY28339
Document #: 38-07507 Rev. *A
Page 3 of 18
Two-Wire SMBus Control Interface
The two-wire control interface implements a Read/Write slave
only interface according to SMBus specification.
The device will accept data written to the D2 address and data
may read back from address D3. It will not respond to any
other addresses, and previously set control registers are
retained as long as power in maintained on the device.
Serial Control Registers
Following the acknowledge of the Address Byte, two additional
bytes must be sent:
1. “Command code“ byte
2. “Byte count” byte.
Although the data (bits) in the command is considered “don’t
care,” it must be sent and will be acknowledged. After the
Command Code and the Byte Count have been acknowl-
edged, the sequence (Byte 0, Byte 1, and Byte 2) described
below will be valid and acknowledged.
Byte 0: CPU Clock Register
[3,4]
Bit
@Pu
p
0
Name
Description
7
Spread Spectrum Enable.
0 = Spread Off, 1 = Spread On. This is a Read and Write control bit.
CPU Clock Power-down Mode Select.
0 = Drive CPUT to 2x IREF and drive CPUC LOW
1 = Tri-state all CPU outputs.
This is only applicable when PD# is LOW. It is not applicable to CPU_STOP#.
3V66_1/VCH Frequency Select
0 = 66M selected, 1 = 48M selected. This is a Read and Write control bit.
Reserved
Reflects the current value of the internal PCI_STOP# function when read. Internally PCI_STOP#
is a logical AND function of the internal SMBus register bit and the external PCI_STOP# pin.
Frequency Select Bit 2. Reflects the value of S2. This bit is Read-only.
Frequency Select Bit 1. Reflects the value of S1. This bit is Read-only.
Reserved
6
0
5
0
3V66_1/VC
H
4
3
HW
PCI_STOP#
2
1
0
HW
HW
1
S2
S1
Byte 1: CPU Clock Register
Bit
@Pu
p
1
0
Name
Description
7
6
Reserved
CPUT/C Output Functionality Control when CPU_STOP# is asserted.
0 = Drive CPUT to 6x IREF and drive CPUC LOW
1 = three-state all CPU outputs.
This bit will override Byte0,Bit6 such that even if it is 0, when PD# goes LOW the CPU outputs
will be three-stated.
CPUT2, CPUC2 CPUT/C2 Functionality Control when CPU_STOP# is asserted.
0 = Stopped LOW,1 = Free Running. This is a Read and Write control bit.
CPUT1, CPUC1 CPUT/C1 Functionality Control When CPU_STOP# is asserted.
0 = Stopped LOW, 1 = Free Running. This is a Read and Write control bit.
Reserved
CPUT2, CPUC2 CPUT/C2 Output Control.
0 = disable, 1 = enabled. This is a Read and Write control bit.
CPUT1, CPUC1 CPUT/C1 Output Control.
0 = disable, 1 = enabled. This is a Read and Write control bit.
Reserved
CPUT1, CPUC1
CPUT2, CPUC2
5
0
4
0
3
2
0
1
1
1
0
1
Notes:
3.
4.
PU = internal pull-up. PD = internal pull-down. T = tri-level logic input with valid logic voltages of LOW = < 0.8V, T = 1.0 – 1.8V and HIGH = > 2.0V.
The “Pin#” column lists the relevant pin number where applicable. The “@Pup” column gives the default state at power-up.
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參數(shù)描述
CY28339ZCT 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Intel CK408 Mobile Clock Synthesizer
CY28339ZCXT 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Intel CK408 Mobile Clock Synthesizer
CY28339ZXC 功能描述:IC CLOCK SYNTHESIZER 48-TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類(lèi)型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱(chēng):93786AFT
CY28339ZXCT 功能描述:IC CLOCK SYNTHESIZER 48-TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類(lèi)型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱(chēng):93786AFT
CY28341 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Universal Single-Chip Clock Solution for VIA P4M266/KM266 DDR Systems
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