參數(shù)資料
型號(hào)： CY25811
廠商： Cypress Semiconductor Corp.
英文描述： Spread Spectrum Clock Generator(擴(kuò)頻時(shí)鐘發(fā)生器)
中文描述： 擴(kuò)頻時(shí)鐘發(fā)生器（擴(kuò)頻時(shí)鐘發(fā)生器）
文件頁數(shù)： 7/12頁
文件大小： 346K
代理商： CY25811
CY25811/12/14
Document Number: 38-07112 Rev. *F
Page 7 of 12
Characteristic Curves
The following curves demonstrate the characteristic behavior of the CY25811/12/14 when tested over a number of environmental and
application specific parameters. These are typical performance curves and are not meant to replace any parameter specified in DC
and AC Specification tables.
Figure 3. Characteristic Curves
.
T
CCJ2
T
CCJ3
T
SU
Cycle-to-Cycle Jitter, Spread on
Cycle-to-Cycle Jitter, Spread on
PLL Lock Time
Fin = 12MHZ, CY25811/12/14
Fin = 24MHz, CY25811/12/14
From V
DD
3.0V to valid SSCLK
–
–
–
630
520
4
ps
ps
ms
AC Electrical Specifications
(Industrial Grade)
Parameter
Description
Condition
Min
Max
Unit
0
100
200
300
400
500
600
4
8
12
16
20
24
28
32
Input Frequency (MHz)
C
1.75
2
2.25
2.5
2.75
-40
-25
-10
5
20
35
Temp (C)
50
65
80
95
110
125
B
6.0 MHz
32.0 MHz
1.8
1.9
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
VDD (volts)
B
4.0 MHz
8.0 MHz
10
12
14
16
18
20
22
24
26
28
30
4
4.5
5
5.5
6
6.5
7
7.5
8
Frequency (MHz), no load, normalized to FRSEL = 0, (4 - 8 MHz).
I
FRSEL = 0
4 - 8 MHz
FRSEL = 1
8 - 16 MHz
FRSEL = M
16 - 32 MHz
Jitter vs. Input Frequency (No Load)
Bandwidth % vs. Temperature
IDD vs. Frequency (FRSEL = 0, 1, M)
Bandwidth % vs. VDD
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