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參數(shù)資料
| 型號： | CY2314ANZ |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 14 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs(帶3 DIMM的應(yīng)用于桌上電腦PC 的3.3V 13輸出SDRAM緩沖器) |
| 中文描述： | 14輸出，3.3V的內(nèi)存緩沖器，用于3個DIMM臺式機（帶3個DIMM的應(yīng)用于桌上電腦電腦的內(nèi)存3.3V的13輸出緩沖器） |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 102K |
| 代理商： | CY2314ANZ |
PRELIMINARY
14 Output, 3.3V SDRAM Buffer for
Desktop PCs with 3 DIMMs
Functional Description
CY2314ANZ
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
September 10, 1998
Y2310
Z
Features
One input to 14 output buffer/driver
Supports up to three SDRAM DIMMs
Two additional outputs for feedback
I
2
C interface for output control
Low skew outputs
Up to 100 MHz operation
Multiple V
DD
and V
SS
pins for noise reduction
Dedicated OE pin for testing
Low EMI outputs
28-pin SOIC (300-mil) package
3.3V operation
The CY2314ANZ is a 3.3V buffer designed to distribute
high-speed clocks in desktop PC applications. The part has 14
outputs, 12 of which can be used to drive up to three SDRAM
DIMMs, and the remaining can be used for external feedback
to a PLL. The device operates at 3.3V and outputs can run up
to 100 MHz, thus making it compatible with Pentium II pro-
cessors. The CY2314ANZ can be used in conjunction with the
CY2280, CY2281, CY2282 or similar clock synthesizer for a
complete Pentium II motherboard solution.
The CY2314ANZ also includes an I
2
C interface which can en-
able or disable each output clock. On power-up, all output
clocks are enabled. A separate Output Enable pin facilitates
testing on ATE.
Pentium is a registered trademark of Intel Corporation.
I
2
C is a trademark of Philips Corporation.
Block Diagram
I
2
C
BUF_IN
SDATA
SCLOCK
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
SDRAM10
SDRAM11
SDRAM12
SDRAM13
1
2
3
4
5
6
7
V
DD
SDRAM11
SDRAM10
V
SS
V
SDRAM9
SDRAM8
V
SS
OE
SDRAM7
SDRAM6
SDRAM13
V
SCLK
28-pin SOIC
Top View
Pin Configuration
Decoding
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
SDRAM0
SDRAM1
V
SS
V
SDRAM2
SDRAM3
V
BUF_IN
SDRAM4
SDRAM5
SDRAM12
V
DDIIC
SDATA
OE
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| CY23FS04ZC | Failsafe 2.5V/ 3.3V Zero Delay Buffer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2314ANZ_08 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:14 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| CY2314ANZSC-1 | 制造商:Cypress Semiconductor 功能描述: |
| CY2314ANZSC-1T | 制造商:Cypress Semiconductor 功能描述: |
| CY2314ANZSXC-1 | 功能描述:時鐘緩沖器 3.3V Buffer COM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY2314ANZSXC-1T | 功能描述:時鐘緩沖器 3.3V Buffer COM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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