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參數(shù)資料
| 型號(hào)： | CY2313ANZ |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs(帶3 DIMM的應(yīng)用于桌上電腦PC 的3.3V 13輸出SDRAM緩沖器) |
| 中文描述： | 13輸出，3.3V的內(nèi)存緩沖器，用于3個(gè)DIMM臺(tái)式機(jī)（帶3個(gè)DIMM的應(yīng)用于桌上電腦電腦的內(nèi)存3.3V的13輸出緩沖器） |
| 文件頁數(shù)： | 2/7頁 |
| 文件大小： | 101K |
| 代理商： | CY2313ANZ |
CY2313ANZ
PRELIMINARY
2
Serial Configuration Map
The Serial bits will be read by the clock driver in the following
order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
.
Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
Reserved and unused bits should be programmed to “0”
I
2
C Address for the CY2313ANZ is:
Pin Summary
Name
Pins
Description
V
DD
V
SS
V
DDIIC
V
SSIIC
BUF_IN
1, 5, 20, 24, 28
3.3V Digital voltage supply
4, 8, 17, 21, 25
Ground
I
2
C Voltage supply
Ground for I
2
C
13
16
9
Input clock
I
2
C data input, internal pull-up to V
DD
I
2
C clock input, internal pull-up to V
DD
SDRAM clock outputs
SDATA
14
SCLK
15
SDRAM [0-12]
2, 3, 6, 7, 10, 11, 12, 18, 19, 22, 23,
26, 27
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
----
Byte 0:SDRAM Active/Inactive Register
(1 = Enable, 0 = Disable), Default = Enabled
Bit
Bit 7 11
Pin #
Description
SDRAM5 (Active/Inactive)
Bit 6 10
SDRAM4 (Active/Inactive)
Bit 5 --
Reserved, drive to 0
Bit 4 --
Reserved, drive to 0
Bit 3 7
SDRAM3 (Active/Inactive)
Bit 2 6
SDRAM2 (Active/Inactive)
Bit 1 3
SDRAM1 (Active/Inactive)
Bit 0 2
SDRAM0 (Active/Inactive)
Byte 1: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
27
Description
Bit 7
SDRAM11 (Active/Inactive)
Bit 6
26
SDRAM10 (Active/Inactive)
Bit 5
23
SDRAM9 (Active/Inactive)
Bit 4
22
SDRAM8 (Active/Inactive)
Bit 3
--
Reserved, drive to 0
Bit 2
--
Reserved, drive to 0
Bit 1
19
SDRAM7 (Active/Inactive)
Bit 0
18
SDRAM6 (Active/Inactive)
Byte 2: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
--
Reserved, drive to 0
Bit 6
12
SDRAM12 (Active/Inactive)
Bit 5
--
Reserved, drive to 0
Bit 4
--
Reserved, drive to 0
Bit 3
--
Reserved, drive to 0
Bit 2
--
Reserved, drive to 0
Bit 1
--
Reserved, drive to 0
Bit 0
--
Reserved, drive to 0
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| CY2318ANZOXC-11T | 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2313ANZ_07 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs |
| CY2313ANZSC-1 | 功能描述:時(shí)鐘緩沖器 3.3V Buffer COM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY2313ANZSC-1T | 制造商:Cypress Semiconductor 功能描述:Clock Fanout Buffer 13-OUT 28-Pin SOIC T/R |
| CY2313ANZSXC-1 | 功能描述:時(shí)鐘緩沖器 3.3V Non Zero Delay SDRAM Buffer RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY2313ANZSXC-1T | 功能描述:時(shí)鐘緩沖器 3.3V Non Zero Delay SDRAM Buffer RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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