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參數(shù)資料
| 型號： | CY2302 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | CONN MINI D RECPT 68POS VERT T/H |
| 中文描述： | 倍頻器和零延遲緩沖器 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 103K |
| 代理商： | CY2302 |
CY2302
Document #: 38-07154 Rev. **
Page 5 of 7
AC Electrical Characteristics:
T
A
= 0
°
C to +70
°
C or
–
40
°
to 85
°
C, V
DD
= 3.3V ±5%
Parameter
Description
Input Frequency
[1]
Test Condition
Min.
Typ.
Max.
Unit
f
IN
f
OUT
t
R
t
F
t
ICLKR
t
ICLKF
t
PD
t
D
t
LOCK
t
JC
t
DC
OUT2 = REF
OUT1 15-pF load
[2]
5
133
MHz
Output Frequency
10
133
MHz
Output Rise Time
2.0V to 0.8V, 15-pF load
3.5
ns
Output Fall Time
Input Clock Rise Time
[3]
Input Clock Fall Time
[3]
FBIN to REF Skew
[4, 5]
2.0V to 0.8V, 15-pF load
2.5
ns
10
ns
10
ns
Measured at V
DD
/2
15-pF load
[6]
–
2
0.6
2
ns
Duty Cycle
40
50
60
%
PLL Lock Time
Power supply stable
1.0
ms
Jitter, Cycle-to-Cycle
Die Out Time
[7]
f
OUT
>30 MHz
300
ps
100
Clock Cycles
AC Electrical Characteristics:
T
A
= 0
°
C to +70
°
C or
–
40
°
to 85
°
C, V
DD
= 5.0V ±10%
Parameter
Description
Input Frequency
[1]
OUT2 = REF
OUT1 15-pF load
[2]
Test Condition
Min.
Typ.
Max.
Unit
f
IN
f
OUT
t
R
t
F
t
ICLKR
t
ICLKF
t
PD
t
D
t
LOCK
t
JC
5
133
MHz
Output Frequency
10
133
MHz
Output Rise Time
2.0V to 0.8V, 15-pF load
2.5
ns
Output Fall Time
Input Clock Rise Time
[3]
Input Clock Fall Time
[3]
FBIN to REF Skew
[4, 5]
2.0V to 0.8V, 15-pF load
1.5
ns
10
ns
10
ns
Measured at V
DD
/2
15-pF load
[6, 8]
–
2
0.6
2
ns
Duty Cycle
40
50
60
%
PLL Lock Time
Power supply stable
1.0
ms
Jitter, Cycle-to-Cycle
FOUT > 30 MHz
200
ps
Ordering Information
Ordering Code
CY2302
Option
-01
Package
Name
S
Package Type
8-pin SOIC (150-mil)
Temperature Grade
C = Commercial (0
o
to 70
o
C)
I = Industrial (
–
40
o
to 85
o
C)
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
Input frequency is limited by output frequency range and input to output frequency multiplication factor (which is determined by circuit configuration).
For the higher drive -11, the load is 20 pF.
Longer input rise and fall time will degrade skew and jitter performance.
All AC specifications are measured with a 50
transmission line, load terminated with 50
to 1.4V.
Skew is measured at 1.4V on rising edges.
Duty cycle is measured at 1.4V.
33 MHz reference input suddenly stopped (0 MHz). Number of cycles provided prior to output falling to <16 MHz.
Duty Cycle measured at 120 MHz. For 133 MHz, degrades to 35/65 worst case.
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