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參數(shù)資料
| 型號： | CY2291 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Three-PLL General Purpose EPROM Programmable Clock Generator |
| 中文描述： | 三鎖相環(huán)通用EPROM的可編程時鐘發(fā)生器 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大?。?/td> | 121K |
| 代理商： | CY2291 |
CY2291
9
Switching Characteristics, Industrial 5.0V
Parameter
Name
Description
Min.
Typ.
Max.
Unit
t
1
Output Period
Clock output range,
5V operation
CY2291I
11.1
(90 MHz)
13000
(76.923 kHz)
ns
CY2291FI
12.5
(80 MHz)
13000
(76.923 kHz)
ns
Output Duty
Cycle
[11]
Duty cycle for outputs, defined as t
2
÷
t
1[12]
f
OUT
> 66 MHZ
Duty cycle for outputs, defined as t
2
÷
t
1[12]
f
OUT
< 66 MHZ
Output clock rise time
[13]
Output clock fall time
[13]
40%
50%
60%
45%
50%
55%
t
3
t
4
t
5
Rise Time
3
5
ns
Fall Time
2.5
4
ns
Output Disable
Time
Time for output to enter three-state mode after
SHUTDOWN/OE goes LOW
10
15
ns
t
6
Output Enable
Time
Time for output to leave three-state mode after
SHUTDOWN/OE goes HIGH
10
15
ns
t
7
Skew
Skew delay between any identical or related
outputs
[3, 12, 15]
< 0.25
0.5
ns
t
8
CPUCLK Slew
Frequency transition rate
1.0
20.0
MHz/
ms
t
9A
Clock Jitter
[14]
Peak-to-peak period jitter (t
9A
Max.
–
t
9A
min.),
% of clock period (f
OUT
< 4 MHz)
Peak-to-peak period jitter (t
9B
Max.
–
t
9B
min.)
(4 MHz < f
OUT
< 16 MHz)
Peak-to-peak period jitter
(16 MHz < f
OUT
<
50 MHz)
Peak-to-peak period jitter
(f
OUT
> 50 MHz)
Lock Time from Power-Up
<0.5
1
%
t
9B
Clock Jitter
[14]
<0.7
1
ns
t
9C
Clock Jitter
[14]
<400
500
ps
t
9D
Clock Jitter
[14]
<250
350
ps
t
10A
Lock Time for
CPLL
<25
50
ms
t
10B
Lock Time for
UPLL and SPLL
Lock Time from Power-Up
<0.25
1
ms
Slew Limits
CPU PLL Slew Limits
CY2291I
8
90
MHz
CY2291FI
8
80
MHz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY2291F | Three-PLL General Purpose EPROM Programmable Clock Generator |
| CY2291FI | Three-PLL General Purpose EPROM Programmable Clock Generator |
| CY2300 | Phase-Aligned Clock Multiplier |
| CY2300SC | Phase-Aligned Clock Multiplier |
| CY2300SI | Phase-Aligned Clock Multiplier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2291_02 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Three-PLL General Purpose EPROM Programmable Clock Generator |
| CY2291_08 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Three-PLL General Purpose EPROM Programmable Clock Generator |
| CY2291EFX | 制造商:Cypress Semiconductor 功能描述: |
| CY2291F | 功能描述:IC 3PLL EPROM CLOCK GEN 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| CY2291FI | 功能描述:IC 3PLL EPROM CLOCK GEN 20-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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