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參數(shù)資料
| 型號： | CY2287 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 100-MHz Spread Spectrum Clock Synthesizer/Driver with USB, Hublink, and SDRAM Support |
| 中文描述： | 100 MHz的擴(kuò)頻時鐘合成器/驅(qū)動器，帶有USB接口，Hublink，和SDRAM支持 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 148K |
| 代理商： | CY2287 |
100-MHz Spread Spectrum Clock Synthesizer/Driver with
USB, Hublink, and SDRAM Support
CY2287
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
June 23, 1999
Features
Benefits
Mixed 2.5V and 3.3V Operation
Multiple output clocks at different frequencies
—Three CPU clocks at 2.5V, up to 100 MHz
—Nine 3.3V SDRAM clocks at 100 MHz
—Eight synchronous PCI clocks at 33 MHz
—Two synchronous APIC clocks at 16.67 MHz or 33
MHz
—Two 3V66 clocks at 66 MHz
—Two USB clocks at 48 MHz
—One reference clock at 14.318 MHz
Spread Spectrum clocking
—31 kHz modulation frequency
—EPROM programmable percentage of spreading
—Default is –0.6%, which is recommended by Intel
—Additional options of –0.25% and –0.4% available
Power-down features
I
2
C Interface
Low skew and low jitter outputs
Test Mode
56-pin SSOP package
Usable with Pentium
II, K6, and 6x86 Processors
Single-chip main motherboard clock generator
—High-Speed Processor Support
—Supports Two 4-Clock SDRAM DIMMs
—Support for Six PCI Slots
—Synchronous to the CPU Clock
—Hublink Support
—Universal Serial Bus Support
—Also used as an input strap to determine APIC frequency
Enables reduction of EMI
Supports mobile systems
Dynamic output control
Meets tight system timing requirements at high frequency
Enables ATE and “bed of nails” testing
Widely available, standard package enables lower cost
Intel and Pentium are registered trademarks of Intel Corporation.
I
2
C is a trademark of Philips Corporation.
SERIAL INTERFACE
CONTROL LOGIC
Logic Block Diagram
EPROM
XTALOUT
XTALIN
APIC [0–1] (16.67/33MHz)
14.318
MHz
OSC.
SDRAM [0-8] (100 MHz)
SEL1
CPU
PLL
REF0/SEL33 (14.318 MHz)
CPU [0–2] (66/100 MHz)
PCI [0–7] (33MHz)
SYS
PLL
USB [0–1] (48MHz)
EPROM
Configurable
Logic
PWR_DWN
3V66 [0–1] (66MHz)
SSOP
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
33
32
31
30
29
36
35
34
REF0/SEL33
V
DDREF
XTAL_IN
XTAL_OUT
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
45
44
43
42
41
37
38
39
40
48
47
46
49
52
51
50
53
56
55
54
V
DDPCI
PCI0
PCI1
V
SSPCI
PCI5
PCI6
AV
SS
V
SSUSB
USB0
SCLK
SDRAM8
V
DDSDRAM
PWRDWN
SDRAM4
V
SSSDRAM
SDRAM0
V
DDAPIC
CPU0
3V66_0
3V66_1
V
DD3V66
PCI3
PCI4
PCI7
USB1
V
DDUSB
SDRAM6
SDRAM2
CPU1
V
SSAPIC
APIC0
V
SSREF
V
SS3V66
PCI2
V
SSPCI
V
DDPCI
AV
DD
V
SSSDRAM
SDRAM7
V
DDSDRAM
SDRAM5
V
SSSDRAM
SDRAM3
V
DDSDRAM
SDRAM1
V
SSCPU
CPU2
V
DDCPU
APIC1
SEL0
SDATA
SEL1
C
SCLK
SDATA
SEL0
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