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參數(shù)資料
| 型號(hào)： | CY2283PVC-2 |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PentiumII, K6, 6x86 100-MHz Clock Synthesizer/Driver for Desktop PCs with ALI or VIA Chipsets, AGP and 3 DIMMs |
| 中文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 219K |
| 代理商： | CY2283PVC-2 |
CY2283
PRELIMINARY
4
Byte 1: CPU Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
47
Description
Bit 7
USBCLK
Bit 6
N/A
(Reserved) drive to ‘0’
Bit 5
N/A
(Reserved) drive to ‘0’
Bit 4
N/A
Not used - drive to ‘0’
Bit 3
40
CPUCLK3 (Active/Inactive)
Bit 2
41
CPUCLK2 (Active/Inactive)
Bit 1
43
CPUCLK1 (Active/Inactive)
Bit 0
44
CPUCLK0 (Active/Inactive)
Byte 3: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
28
SDRAM7 (Active/Inactive)
Bit 6
29
SDRAM6 (Active/Inactive)
Bit 5
31
SDRAM5 (Active/Inactive)
Bit 4
32
SDRAM4 (Active/Inactive)
Bit 3
34
SDRAM3 (Active/Inactive)
Bit 2
35
SDRAM2 (Active/Inactive)
Bit 1
37
SDRAM1 (Active/Inactive)
Bit 0
38
SDRAM0 (Active/Inactive)
Byte 5: Peripheral Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
N/A
(Reserved) drive to ‘0’
Bit 6
N/A
(Reserved) drive to ‘0’
Bit 5
N/A
(Reserved) drive to ‘0’
Bit 4
N/A
(Reserved), drive to ‘0’
Bit 3
N/A
(Reserved) drive to ‘0’
Bit 2
N/A
(Reserved) drive to ‘0’
Bit 1
N/A
(Reserved) drive to ‘0’
Bit 0
2
REF0 (Active/Inactive)
Byte 2: PCI Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
--
(Reserved) drive to ‘0’
Bit 6
7
PCICLK_F (Active/Inactive)
Bit 5
15
AGP1 (Active/Inactive)
Bit 4
14
AGP0 (Active/Inactive)
Bit 3
12
PCICLK3 (Active/Inactive)
Bit 2
11
PCICLK2 (Active/Inactive)
Bit 1
10
PCICLK1 (Active/Inactive)
Bit 0
8
PCICLK0 (Active/Inactive)
Byte 4: SDRAM Active/Inactive Register
(1 = Active, 0 = Inactive), Default = Active
Bit
Pin #
Description
Bit 7
N/A
Not used - drive to ‘0’
Bit 6
N/A
Not used - drive to ‘0’
Bit 5
N/A
Not used - drive to ‘0’
Bit 4
N/A
Not used - drive to ‘0’
Bit 3
17
SDRAM11
Bit 2
18
SDRAM10
Bit 1
20
SDRAM9
Bit 0
21
SDRAM8
Byte 6: Reserved, for future use
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2285 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:100-MHz Pentium㈢II Clock Synthesizer/Driver with Spread Spectrum for Mobile PCs |
| CY2285PVC-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| CY2285PVC-2 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:100-MHz Pentium㈢II Clock Synthesizer/Driver with Spread Spectrum for Mobile PCs |
| CY2285PVC-3 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:100-MHz Pentium㈢II Clock Synthesizer/Driver with Spread Spectrum for Mobile PCs |
| CY2287 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:100-MHz Spread Spectrum Clock Synthesizer/Driver with USB, Hublink, and SDRAM Support |
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