參數(shù)資料
型號(hào)： CY2278A
廠商： Cypress Semiconductor Corp.
英文描述： PentiumII Clock Synthesizer/Driver for Mobile PCs with Intel 82430TX and No SDRAM(帶英特爾82430TX和2個(gè)DIMM 或3個(gè)SO-DIMM 的應(yīng)用于移動(dòng)PC機(jī)的奔騰II6x86, K6 時(shí)鐘合成器/驅(qū)動(dòng)器)
中文描述： PentiumII時(shí)鐘合成器/與英特爾82430TX和無內(nèi)存（帶英特爾82430TX內(nèi)存和2個(gè)或3個(gè)SO - DIMM插槽的應(yīng)用于移動(dòng)電腦機(jī)的奔騰II6x86，K6時(shí)鐘合成器便攜式電腦驅(qū)動(dòng)器/驅(qū)動(dòng)器）
文件頁數(shù)： 6/11頁
文件大?。?/td> 153K
代理商： CY2278A
CY2278A
6
Switching Characteristics
[8]
Parameter
Output
Description
Test Conditions
Min.
Typ.
Max.
Unit
t
1
t
2
All
Output Duty Cycle
[9]
t
1
= t
1A
÷
t
1B
Between 0.4V and 2.0V for 2.5V clocks
45
50
55
%
XCPUCLK
XCPU Clock Rising and
Falling Edge Rate
0.6
4.0
V/ns
t
2
CPUCLK,
IOAPIC
CPU and IOAPIC Clock
Rising and Falling Edge
Rate
Between 0.4V and 2.0V for 2.5V clocks
Between 0.4V and 2.4V for 3.3V clocks
0.8
4.0
V/ns
t
2
PCICLK
PCI Clock Rising and Fall-
ing Edge Rate
Between 0.4V and 2.4V
0.75
4.0
V/ns
t
2
USBCLK,
CLK8MHZ
USB, CLK8MHZ Clock Ris-
ing and Falling Edge Rate
Between 0.4V and 2.4V
0.8
4.0
V/ns
t
2
REF0
REF0 Clock Rising and
Falling Edge Rate
Between 0.4V and 2.4V
0.6
4.0
V/ns
t
2
REF1
REF1 Rising and Falling
Edge Rate
Between 0.4V and 2.4V
0.5
2.0
V/ns
t
3
t
3
XCPUCLK
XCPU Clock Rise Time
Between 0.4V and 2.0V
0.4
2.67
ns
CPUCLK
IOAPIC
CPU and IOAPIC Clock
Rise Time
Between 0.4V and 2.4V for 3.3V clocks
Between 0.4V and 2.0V for 2.5V clocks
0.5
0.4
2.5
2.0
ns
t
3
t
3
PCICLK
PCI Clock Rise Time
Between 0.4V and 2.4V
0.5
2.67
ns
USBCLK,
CLK8MHZ
USB Clock and CLK8MHZ
Rise Time
Between 0.4V and 2.4V
2.5
ns
t
4
t
4
XCPUCLK
XCPU Clock Fall Time
Between 2.0V and 0.4V
0.4
2.67
ns
CPUCLK,
IOAPIC
CPU and IOAPIC Clock
Fall Time
Between 2.4V and 0.4V for 3.3V clocks
Between 2.0V and 0.4V for 2.5V clocks
0.5
0.4
2.5
2.0
ns
t
4
t
4
PCICLK
PCI Clock Fall Time
Between 2.4V and 0.4V
0.5
2.67
ns
USBCLK,
CLK8MHZ
USB Clock and I/O Clock
Fall Time
Between 2.4V and 0.4V
2.5
ns
t
5
XCPUCLK,
CPUCLK
XCPU-XCPU Clock Skew
CPU-CPU Clock Skew
Measured at 1.25V for 2.5V clocks
Measured at 1.5V for 3.3V clocks
100
300
250
ps
t
5
PCICLK
PCI-PCI Clock Skew
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
500
ps
t
6
XCPUCLK,
PCICLK
XCPU-PCI Clock Skew
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks (-1L, -2L, -4L con-
figurations)
500
ps
t
6
XCPUCLK,
PCICLK
XCPU-PCI Clock Skew
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks (-3L configuration)
1
3
5
ns
t
7
XCPUCLK,
CPUCLK
CPU-XCPU Clock Skew
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
750
ps
t
8
XCPUCLK,
CPUCLK
Cycle-Cycle Clock Jitter
[10]
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
400
ps
t
8
USBCLK,
PCICLK
Cycle-Cycle Clock Jitter
Measured at 1.5V
500
ps
t
8
t
9
CLK8MHZ
Cycle-Cycle Clock Jitter
Measured at 1.5V
650
ps
XCPUCLK,
PCICLK,
CPUCLK
Power-up Time
CPU, PCI clock stabilization from
power-up
3
ms
Notes:
8.
9.
10. Room Temperature.
All parameters specified with loaded outputs;SEL[2:0]=110.
Duty cycle is measured at 1.5V when V
DD
= 3.3V. When V
DDCPU
= 2.5V, CPUCLK duty cycle is measured at 1.25V.
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