參數(shù)資料
型號(hào): CY2276A-21
廠商: Cypress Semiconductor Corp.
英文描述: PentiumII Clock Synthesizer/Driver for Desktop PCs with Intel 82440LX and 3SO- DIMMs(帶英特爾82440LX 和3SO-DIMM的應(yīng)用于桌上型PC機(jī)的奔騰II時(shí)鐘合成器/驅(qū)動(dòng)器)
中文描述: PentiumII時(shí)鐘合成器/桌面電腦與英特爾82440LX和3SO - DIMM內(nèi)存(帶英特爾82440LX和3SO - DIMM內(nèi)存的應(yīng)用于桌上型電腦機(jī)的奔騰二時(shí)鐘合成器/驅(qū)動(dòng)器驅(qū)動(dòng)程序)
文件頁(yè)數(shù): 7/13頁(yè)
文件大?。?/td> 205K
代理商: CY2276A-21
CY2276A-21
CY2276A-31
7
CY2276A-21 Switching Characteristics
[4,5]
Over the Operating Range
Parameter
t
1
Output
CPUCLK,
SDRAM,
REF0,
IOAPIC
Description
Test Conditions
Min.
45
Typ.
50
Max.
55
Unit
%
Output Duty Cycle
[6]
t
1
= t
1A
÷
t
1B
t
1
t
1C
t
1C
t
1D
t
1D
t
2
PCI
Output Duty Cycle
[6]
t
1
= t
1A
÷
t
1B
Above 2.0V, 66.6 MHz, V
DDCPU
= 2.5V
Above 2.4V, 33.3 MHz, V
DD
= 3.3V
Below 0.4V, 66.6 MHz, V
DDCPU
= 2.5V
Below 0.4V, 33.3 MHz, V
DD
= 3.3V
Between 0.4V and 2.0V
40
50
55
%
CPUCLK
CPU Clock HIGH Time
5.2
ns
PCICLK
PCI Clock HIGH Time
12.0
ns
CPUCLK
CPU Clock LOW Time
5.0
ns
PCICLK
PCI Clock LOW Time
12.0
ns
CPUCLK
CPU Clock Rising and
Falling Edge Rate
0.9
4.0
V/ns
t
2
PCICLK
PCI Clock Rising and
Falling Edge Rate
Between 0.4V and 2.4V
1.0
4.0
V/ns
t
2
SDRAM
SDRAM Rising and Fall-
ing Edge Rate
Between 0.4V and 2.4V
0.9
4.0
V/ns
t
2
REF0
REF0 Rising and Falling
Edge Rate
Between 0.4V and 2.4V
0.75
4.0
V/ns
t
2
IOAPIC
IOAPIC Rising and Fall-
ing Edge Rate
Between 0.4V and 2.0V
0.75
4.0
V/ns
t
3
t
4
t
5
t
6
CPUCLK
CPU Clock Rise Time
Between 0.4V and 2.0V, V
DDCPU
= 2.5V
Between 2.0V and 0.4V, V
DDCPU
= 2.5V
Measured at 1.25V, V
DDCPU
= 2.5V
Measured at 1.25V for CPU clocks and
1.5V for other clocks,
V
DDCPU
= 2.5V, V
DD
= 3.3V
Measured at 1.25V for CPU clocks and
1.5V for other clocks,
V
DDCPU
= 2.5V, V
DD
= 3.3V
Measured at 1.25V, V
DDCPU
= 2.5V
Measured at 1.5V, V
DD
= 3.3V
0.4
1.78
ns
CPUCLK
CPU Clock Fall Time
0.4
1.78
ns
CPUCLK
CPU-CPU Clock Skew
100
250
ps
CPUCLK,
PCICLK
CPU-PCI Clock Skew
1.0
3.0
6.0
ns
t
7
CPUCLK,
SDRAM
CPU-SDRAM Clock
Skew
650
ps
t
8
t
8
CPUCLK
Cycle-Cycle Clock Jitter
400
ps
PCICLK
SDRAM
Cycle-Cycle Clock Jitter
500
ps
t
9
CPUCLK,
PCICLK,
SDRAM
Power-up Time
CPU, PCI, and SDRAM clock stabiliza-
tion from power-up
3
ms
Notes:
5.
6.
All parameters specified with loaded outputs.
Duty cycle is measured at 1.5V when V
DD
= 3.3V. When V
DDCPU
= 2.5V, CPUCLK duty cycle is measured at 1.25V.
相關(guān)PDF資料
PDF描述
CY2276A-31 PentiumII Clock Synthesizer/Driver for Desktop PCs with Intel 82440LX and 3SO- DIMMs(帶英特爾82440LX 和3SO-DIMM的應(yīng)用于桌上型PC機(jī)的奔騰II時(shí)鐘合成器/驅(qū)動(dòng)器)
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