參數(shù)資料
型號: CY2276A-12
廠商: Cypress Semiconductor Corp.
英文描述: PentiumII Clock Synthesizer/Driver for Desktop PCs with Intel 82440LX and 4 DIMMs(帶英特爾82440LX 和4個DIMM的應(yīng)用于桌上型PC機(jī)的奔騰II時鐘合成器/驅(qū)動器)
中文描述: PentiumII時鐘合成器/與英特爾82440LX和4個DIMM臺式機(jī)驅(qū)動器(帶英特爾82440LX和4個DIMM內(nèi)存的應(yīng)用于桌上型電腦機(jī)的奔騰二時鐘合成器/驅(qū)動器)
文件頁數(shù): 6/11頁
文件大?。?/td> 164K
代理商: CY2276A-12
CY2276A-12
CY2276A-13
6
Switching Characteristics
[5,7]
Over the Operating Range
Parameter
Output
Description
Test Conditions
Min.
Typ.
Max.
Unit
t
1
CPU,
APIC,
SDRAM,
REF0
Output Duty Cycle
[8]
t
1
= t
1A
÷
t
1B
45
50
55
%
t
1
t
1C
t
1C
t
1D
t
1D
t
2
PCI
Output Duty Cycle
[8]
t
1
= t
1A
÷
t
1B
Above 2.0V, 66.6 MHz, V
DDCPU
= 2.5V
Above 2.4V, 33.3 MHz
40
50
55
%
CPUCLK
CPU Clock HIGH Time
5.2
ns
PCICLK
PCI Clock HIGH Time
11.0
ns
CPUCLK
CPU Clock LOW Time
Below 0.4V, 66.6 MHz, V
DDCPU
= 2.5V
Below 0.4V, 33.3 MHz
5.0
ns
PCICLK
PCI Clock LOW Time
12.0
ns
CPUCLK
CPU Clock Rising and
Falling Edge Rate
Between 0.7V and 1.7V, V
DDCPU
= 2.5V
1.0
4.0
V/ns
t
2
PCICLK
PCI Clock Rising and
Falling Edge Rate
Between 0.8V and 2.0V
1.0
4.0
V/ns
t
2
REF0
REF Clock Rising and
Falling Edge Rate
Between 0.8V and 2.0V
0.8
4.0
V/ns
t
2
SDRAM
SDRAM Rising and Fall-
ing Edge Rate
Between 0.8V and 2.0V
0.8
4.0
V/ns
t
2
IOAPIC
IOAPIC Clock Rising and
Falling Edge Rate
Between 0.7V and 1.7V, V
DDQ2
= 2.5V
0.8
4.0
V/ns
t
3
t
4
t
5
t
6
CPUCLK
CPU Clock Rise Time
Between 0.7V and 1.7V, V
DDCPU
= 2.5V
Between 1.7V and 0.7V, V
DDCPU
= 2.5V
Measured at 1.25V, V
DDCPU
= 2.5V
Measured at 1.25V for 2.5V
clocks, and at 1.5V for 3.3V
clocks
0.25
1.0
ns
CPUCLK
CPU Clock Fall Time
0.25
1.0
ns
CPUCLK
CPU-CPU Clock Skew
100
275
ps
CPUCLK,
PCICLK
CPU-PCI Clock Skew
-12 option
1.0
3.0
6.0
ns
-13 option
1.0
4.8
ns
t
7
CPUCLK,
SDRAM
CPU-SDRAM Clock
Skew
Measured at 1.25V for 2.5V clocks, and at
1.5V for 3.3V clocks
700
ps
t
8
t
8
t
8
t
9
CPUCLK
Cycle-Cycle Clock Jitter
Measured at 1.25V for 2.5V clocks
250
ps
SDRAM
Cycle-Cycle Clock Jitter
Measured at 1.5V for 3.3V clocks
400
ps
PCICLK
Cycle-Cycle Clock Jitter
Measured at 1.5V
500
ps
CPUCLK,
PCICLK,
SDRAM
Power-up Time
CPU, PCI, and SDRAM clock stabilization
from power-up
3
ms
Notes:
7.
8.
All parameters specified with loaded outputs.
Duty cycle is measured at 1.5V when V
DD
= 3.3V. When V
DDCPU
= 2.5V, CPUCLK duty cycle is measured at 1.25V.
相關(guān)PDF資料
PDF描述
CY2276A-13 PentiumII Clock Synthesizer/Driver for Desktop PCs with Intel 82440LX and 4 DIMMs(帶英特爾82440LX 和4個DIMM的應(yīng)用于桌上型PC機(jī)的奔騰II時鐘合成器/驅(qū)動器)
CY2276A-21 PentiumII Clock Synthesizer/Driver for Desktop PCs with Intel 82440LX and 3SO- DIMMs(帶英特爾82440LX 和3SO-DIMM的應(yīng)用于桌上型PC機(jī)的奔騰II時鐘合成器/驅(qū)動器)
CY2276A-31 PentiumII Clock Synthesizer/Driver for Desktop PCs with Intel 82440LX and 3SO- DIMMs(帶英特爾82440LX 和3SO-DIMM的應(yīng)用于桌上型PC機(jī)的奔騰II時鐘合成器/驅(qū)動器)
CY2278A PentiumII Clock Synthesizer/Driver for Mobile PCs with Intel 82430TX and No SDRAM(帶英特爾82430TX和2個DIMM 或3個SO-DIMM 的應(yīng)用于移動PC機(jī)的奔騰II6x86, K6 時鐘合成器/驅(qū)動器)
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