
Pentium/II Clock Synthesizer/Driver for Desktop PCs with
Intel 82440LX with 3 DIMMs
CY2275A
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
October 12, 1998
Features
Mixed 2.5V and 3.3V operation
Clock solution to meet requirements of Pentium and
Pentium II motherboards
—Four CPU clocks at 2.5V
—Up to twelve 3.3V SDRAM clocks
—Seven synchronous PCI clocks
—Two 2.5V IOAPIC clocks at 14.318 MHz
—One 3.3V Ref. clock at 14.318 MHz
1 ns–5.8 ns CPU-PCI delay, factory-EPROM
programmable
I
2
C Serial Configuration Interface
Factory-EPROM programmable output drive and slew
rate for EMI cusomization
Factory-EPROM programmable CPU clock frequencies
for custom configurations
Powerdown, CPU stop and PCI stop pins for power man-
agement
High drive, low skew (<250ps) and low jitter outputs
Intel Test Mode support
Available in space-saving 48-pin SSOP package
Functional Description
The CY2275A is a Clock Synthesizer/Driver for a Pentium and
Pentium II-based PCs using an Intel 82440LX or similar
core-logic chipset.
The CY2275A outputs four CPU clocks at 2.5V. There are sev-
en PCI clocks, running at one half the CPU clock frequency.
One of the PCI clocks is free-running. Additionally, the part
outputs twelve 3.3V SDRAM clocks, two 2.5V IOAPIC clocks
at 14.318 MHz, and one 3.3V reference clock at 14.318 MHz.
The part has power-down, CPU stop, and PCI stop pins for
power management control. These inputs are multiplexed with
SDRAM clock outputs, and are selected when the MODE pin
is driven LOW. Additionally, these inputs are synchronized
on-chip, enabling glitch-free output transitions. When the
CPU_STOP input is asserted, the CPU clock outputs are driv-
en LOW. When the PCI_STOP input is asserted, the PCI clock
outputs (except the free-running PCI clock) are driven LOW.
Finally, when the PWR_DWN pin is asserted, the reference
oscillator and PLLs are shut down, and all outputs are driven
LOW.
T
The CY2275A outputs are designed for low EMI emission.
Controlled rise and fall times, unique output driver circuits and
factory-EPROM programmable output drive and slew-rate en-
able optimal configurations for EMI control.
CY2275A Selector Guide
Note:
1.
One free-running PCI clock.
Clocks Outputs
-12
4
9/12
7
[1]
2
1
1-5.8 ns
CPU@2.5V (66.6MHz)
SDRAM
PCI (33.3MHz)
IOAPIC (14.318 MHz)
Ref (14.318MHz)
CPU-PCI delay
Intel and Pentium are registered trademarks of Intel Corporation.
I
2
C is a trademark of Philips Corporation.
Pin Configuration
Top View
Logic Block Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
33
32
31
30
29
28
25
26
27
36
35
34
AV
DD
REF0
SSOP
45
44
43
42
41
40
37
38
39
48
47
46
C
V
SS
XTALIN
XTALOUT
V
DDQ3
PCICLK_F
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
V
DDQ3
V
SS
PCICLK5
SDRAM11
SDRAM10
V
DDQ3
SDRAM9
SDRAM8
V
SS
SDATA
SCLK
V
DDQ2
IOAPIC0
IOAPIC1
V
SS
CPUCLK0
CPUCLK1
V
DDCPU
CPUCLK2
CPUCLK3
V
SS
SDRAM0
SDRAM1
V
DDQ3
SDRAM2
SDRAM3
V
SS
SDRAM4
SDRAM5/PWR_DWN
V
DDQ3
SDRAM6/CPU_STOP
SDRAM7/PCI_STOP
V
SS
OE
MODE
V
SS
XTALOUT
XTALIN
IOAPIC [0:1] (14.318 MHz)
14.318
MHz
OSC.
SDRAM [0-4],[8-11]
OE
SDRAM7/PCI_STOP
V
DDQ2
REF0 (14.318 MHz)
CPU
PLL
MODE
/2
Delay
SCLK
SDATA
CPUCLK [0-3]
V
DDCPU
SDRAM6/CPU_STOP
PCI [0-5]
PCICLK_F
STOP
LOGIC
STOP
LOGIC
INTERFACE
CONTROL
LOGIC
SERIAL
SDRAM5/PWR_DWN