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參數(shù)資料
| 型號(hào)： | CY2220-1 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 133-MHz Spread Spectrum Clock Synthesizer/Driver With Differential CPU Outputs |
| 中文描述： | 133 - MHz的擴(kuò)頻時(shí)鐘合成器/驅(qū)動(dòng)器，差分輸出的CPU |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大?。?/td> | 128K |
| 代理商： | CY2220-1 |
CY2220
Document #: 38-07206 Rev. *A
Page 5 of 11
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Switching Characteristics
[4]
Over the Operating Range
Parameter
t
1
t
2
t
2
t
2
Output
Description
Test Conditions
Min.
45
175
0.5
1.0
Max.
55
700
2.0
4.0
Unit
%
ps
V/ns
V/ns
All
CPU
USB, REF
PCI, 3V66,
MemRef
CPU
USB, REF
PCI, 3V66,
MemRef
CPU
3V66
PCI
3V66,PCI
CPU
Output Duty Cycle
[5]
Rise Time
Rising Edge Rate
Rising Edge Rate
t
1A
/(t
1B
)
Measured at 20% to 80% of V
OH
Between 0.4V and 2.4V
Between 0.4V and 2.4V
t
3
t
3
t
3
Fall Time
Falling Edge Rate
Falling Edge Rate
Measured at 80% to 20% of V
OH
Between 2.4V and 0.4V
Between 2.4V and 0.4V
175
0.5
1.0
700
2.0
4.0
ps
V/ns
V/ns
t
4
t
5
t
6
t
7
t
8
CPU-CPU Skew
3V66-3V66 Skew
PCI-PCI Skew
3V66-PCI Clock Skew
Cycle-Cycle Clock Jitter
Measured at Crossover
Measured at 1.5V
Measured at 1.5V
3V66 leads. Measured at 1.5V
Measured at Crossover t
8
= t
8A
–
t
8B
With all outputs running
Measured at 1.5V t
9
= t
9A
–
t
9B
Measured at 1.5V t
9
= t
9A
–
t
9B
Measured at 1.5V t
9
= t
9A
–
t
9B
Measured at 1.5V t
9
= t
9A
–
t
9B
Measured at 1.5V t
9
= t
9A
–
t
9B
CPU and PCI clock stabilization from
power-up
Measured with test loads
[6, 7]
Measured with test loads
[7]
150
250
500
3.5
200
ps
ps
ps
ns
ps
1.5
t
9
t
9
t
9
t
9
t
9
Mref
3V66
USB
PCI
REF
CPU, PCI
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Cycle-Cycle Clock Jitter
Settle Time
250
300
350
500
1000
3
ps
ps
ps
ps
ps
ms
CPU
CPU
Rise/Fall Matching
Overshoot
20%
V
OH
+
0.2
V
CPU
CPU
CPU
CPU
Undershoot
High-level Output Voltage
Low-level Output Voltage
Crossover Voltage
Measured with test loads
[7]
Measured with test loads
[7]
Measured with test loads
[7]
Measured with test loads
[7]
–
0.2
0.65
0.0
45%
of
V
OH
V
V
V
V
V
oh
V
ol
V
crossover
0.74
0.05
55%
of
V
OH
Notes:
4.
5.
6.
7.
All parameters specified with loaded outputs. Parameters not tested in production, but are guaranteed by design characterization.
Duty cycle is measured at 1.5V with V
DD
at 3.3V on all output except CPU. Duty Cycle on CPU is measured at V
.
Determined as a fraction of 2*(t
–
t
RN
)/(t
RP
+ t
RN
)Where t
RP
is a rising edge and t
RN
is an intersecting falling edge.
The test load is specified in test circuit.
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