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參數(shù)資料
| 型號(hào)： | CY22180SXI-XXXT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類(lèi)： | XO, clock |
| 英文描述： | Very Low Jitter Field and Factory Programmable Clock Generator |
| 中文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, LEAD FREE, MS-012, SOIC-8 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大小： | 207K |
| 代理商： | CY22180SXI-XXXT |
PRELIMINARY
CY22180
Document #: 001-15577 Rev. **
Page 5 of 8
T
PJ3[2, 3]
CLKOUT pk-pk Period
Jitter, REFOUT on
REFOUT pk-pk Period Jitter REFOUT = 10-133 MHz
CLKOUT = 20–200 MHz
–
150
(±75)
–
–
ps
T
PJ4[2, 3]
–
265
(±133)
350
ps
t
STP
Power Down Time
(pin 3 = PD#)
Output Disable Time
(pin 3 = OE)
Output Enable Time
(pin 3 = OE)
Power Up Time,
Crystal is used
Power Up Time,
Reference clock is used
Time from falling edge on PD# to stopped outputs
(Asynchronous)
Time from falling edge on OE to stopped outputs
(Asynchronous)
Time from rising edge on OE to outputs at a valid
frequency (Asynchronous)
Time from rising edge on PD# to outputs at valid
frequency (Asynchronous)
Time from rising edge on PD# to outputs at valid
frequency (Asynchronous), reference clock at
correct frequency
–
150
ns
T
OE1
–
150
350
ns
T
OE2
–
150
350
ns
t
PU1
–
3.5
5
ms
t
PU2
–
2
3
ms
AC Electrical Characteristics
[1]
Parameter
Description
Condition
Min
Typ
Max
Unit
Notes
4. Since the load capacitors (C
and C
XOUT
) are provided by the CY22180, no external capacitors are needed on the XIN
and XOUT pins to match the crystal
load capacitor (C
). Only a single 0.1-
μ
pin.
5. If an external clock is used, apply the clock to XIN (pin 1) and leave XOUT (pin 8) floating (unconnected).
Application Circuits
[4, 5]
0.1uF
VDD or
control
1
3
2
4
5
6
7
8
XIN/CLKIN
VDD
PD#/OE
VSS
REFOUT
CLKOUT
NC
XOUT
Power
CY22180
Crystal
no
connect
0.1uF
1
3
2
4
5
6
7
8
XIN/CLKIN
VDD
PD#/OE
VSS
REFOUT
CLKOUT
NC
XOUT
Power
CY22180
CLKIN
no
connect
no
connect
VDD or
control
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