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參數(shù)資料
| 型號： | CXP7500P11 |
| 廠商： | Sony Corporation |
| 英文描述： | CMOS 8-bit Single Chip Microcomputer |
| 中文描述： | 的CMOS 8位單片機 |
| 文件頁數(shù)： | 16/25頁 |
| 文件大小： | 354K |
| 代理商： | CXP7500P11 |
– 16 –
CXP7500P10/7500P11
1
Indicates three values according to the contents of the clock control register (CLC: 000FEh) upper 2 bits
(CPU clock selection).
t
sys [ns] = 2000/fc (Upper 2 bits = “00”), 4000/fc (Upper 2 bits = “01”), 16000/fc (Upper 2 bits = “11”)
1/fc
EXTAL
t
XH
t
XL
t
CF
t
CR
0.4V
V
DD
– 0.4V
AAAA
AAAA
EXTAL
XTAL
AAAA
AAAA
EXTAL
Crystal oscillation
Ceramic oscillation
External clock
XTAL
74HC04
C
1
C
2
AAAA
AAAA
TEX
32kHz clock applied condition
Crystal oscillation
TX
C
1
C
2
TEX
EC
t
EH
t
TH
t
EL
t
TL
t
EF
t
TF
t
ER
t
TR
0.2V
DD
0.8V
DD
AC Characteristics
(1) Clock timing
System clock frequency
System clock input pulse width
System clock input rise and fall
times
Event count input clock pulse
width
Event count input clock rise
and fall times
System clock frequency
Event count input clock input
pulse width
Event count input clock rise
and fall times
f
C
t
XL
,
t
XH
t
CR
,
t
CF
t
EH
,
t
EL
t
ER
,
t
EF
f
C
t
TL
,
t
TH
t
TR
,
t
TF
XTAL
EXTAL
EXTAL
EXTAL
EC
EC
TEX
TX
TEX
TEX
MHz
ns
ns
ns
ms
kHz
μs
ms
Item
Symbol
Pins
Conditions
Min.
Unit
Fig. 1, Fig.2
Fig. 1, Fig.2
External clock drive
Fig. 1, Fig.2
External clock drive
Fig. 3
Fig. 3
V
DD
= 2.7 to 5.5V
Fig. 2 (32kHz clock
applied conditions)
Fig. 3
Fig. 3
8
17
4
t
sys
1
10
Typ.
32.768
Max
24
200
20
20
(Ta = –20 to +75°C, V
DD
= 4.5 to 5.5V, Vss = 0V reference)
Fig.2. Clock applied conditions
Fig. 1. Clock timing
Fig. 3. Event count clock timing
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