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Description
The CXP7500P10/7500P11 is a CMOS 8-bit single
chip microcomputer integrating on a single chip an A/D
converter, serial interface, timer/counter, time-base
timer, on-screen display function, I
2
C bus interface,
PWM output, remote control reception circuit, HSYNC
counter, watchdog timer, 32kHz timer/counter besides
the basic configurations of 8-bit CPU, ROM, RAM, I/O
ports.
The CXP7500P10/7500P11 also provides a sleep
function that enables to lower the power consumption.
CXP7500P10/7500P11 is the PROM-incorporated
version of the CXP750096/750010/750097/750011 with
built-in mask ROM. This provides the additional feature
of being able to write directly into the program. Thus, it
is most suitable for evaluation use during system
development and for small-quantity production.
Features
A wide instruction set (213 instructions) which covers
various types of data
– 16-bit operation/multiplication and division/
Boolean bit operation instructions
Minimum instruction cycle
167ns at 24MHz operation
122μs at 32kHz operation
120K bytes
2496 bytes (Excludes VRAM for on-screen display)
Incorporated ROM
Incorporated RAM
Peripheral functions
– A/D converter
8-bit 6-channel successive approximation method
(Conversion time of 3.25μs at 16MHz)
8-bit clock sync type (MSB/LSB first selectable), 1 channel
8-bit timer
8-bit timer/counter
19-bit time-base timer
32kHz timer/counter
24
×
32 dots, 512 character types,
15 character colors, 2 lines
×
32 characters,
frame background 8 colors/half blanking,
background on full screen 15 colors/half blanking
edging/shadowing/rounding for every line,
background with shadow for every character, double scanning,
Sprite OSD 24
×
32 dots, 1 screen, 8 colors for every dot
– Serial interface
– Timer
– On-screen display (OSD) function
– I
2
C bus interface
– PWM output
8 bits, 8 channels
14 bits, 1 channel
8-bit pulse measurement counter, 6-stage FIFO
2 channels
– Remote control reception circuit
– HSYNC counter
– Watchdog timer
Interruption
Standby mode
Package
Piggy/evaluation chip
13 factors, 13 vectors, multi-interruption possible
Sleep
64-pin plastic SDIP/QFP, 52-pin plastic SDIP
CXP750000 64-pin ceramic PQFP/PSDIP (Supports custom font)
Perchase of Sony's I
2
C components conveys a licence under the Philips I
2
C Patent Rights to use these components
in an I
2
C system, provided that the system conforms to the I
2
C Standard Specifications as defined by Philips.
CXP7500P10/7500P11
CMOS 8-bit Single Chip Microcomputer
– 1 –
E99104-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Structure
Silicon gate CMOS IC
64 pin SDIP (Plastic)
64 pin QFP (Plastic)
52 pin SDIP (Plastic)