參數(shù)資料
型號(hào): CXD3615R
廠商: Sony Corporation
英文描述: Timing Generator for Frame Readout CCD Image Sensor
中文描述: 時(shí)序發(fā)生器傳感器讀出CCD圖像幀
文件頁數(shù): 3/43頁
文件大小: 461K
代理商: CXD3615R
3
CXD3615R
Pin Description
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
V
SS
1
RST
SNCSL
ID/EXP
WEN/FLD
SSGSL
V
DD
1
V
DD
2
RG
V
SS
2
V
SS
3
H1
H2
V
DD
3
V
DD
4
XSHP
XSHD
TEST1
PBLK
CLPDM
TEST2
OBCLP
ADCLK
V
SS
4
CKO
CKI
OSCO
OSCI
V
DD
5
MCKO
I/O
I
I
O
O
I
O
O
O
O
O
I
O
O
O
O
O
I
O
I
O
Description
GND
Internal system reset input.
Normally apply reset during power-on.
High: Normal operation, Low: Reset control
Schmitt trigger input
Control input used to switch sync system.
High: CKI sync, Low: MCKO sync
With pull-down resistor
Vertical direction line identification pulse output/exposure time identification pulse
output.
Switching possible using the serial interface data. (Default: ID)
Memory write timing pulse output/field discrimination pulse output.
Switching possible using the serial interface data. (Default: WEN)
Internal SSG enable. High: Internal SSG valid, Low: External sync valid
With pull-down resistor
3.3V power supply. (Power supply for common logic block)
3.3V power supply. (Power supply for RG)
CCD reset gate pulse output.
GND
GND
CCD horizontal register clock output.
CCD horizontal register clock output.
3.3V power supply. (Power supply for H1/H2)
3.3V power supply. (Power supply for CDS)
CCD precharge level sample-and-hold pulse output.
CCD data level sample-and-hold pulse output.
IC test pin 1; normally fixed to GND.
With pull-down resistor
Pulse output for horizontal and vertical blanking period pulse cleaning
CCD dummy signal clamp pulse output.
IC test pin 2; normally fixed to GND.
With pull-down resistor
CCD optical black signal clamp pulse output.
The horizontal/vertical OB pattern can be changed using the serial interface data.
Clock output for analog/digital conversion IC.
Logical phase adjustment possible using the serial interface data.
GND
Inverter output.
Inverter input.
Inverter output for oscillation. When not used, leave open or connect a capacitor.
Inverter input for oscillation. When not used, fix to low.
3.3V power supply. (Power supply for common logic block)
System clock output for signal processing IC.
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