參數(shù)資料
型號: CXD3605R
廠商: Sony Corporation
英文描述: Timing Generator for Frame Readout CCD Image Sensor
中文描述: 時序發(fā)生器傳感器讀出CCD圖像幀
文件頁數(shù): 1/36頁
文件大?。?/td> 344K
代理商: CXD3605R
Timing Generator for Frame Readout CCD Image Sensor
Description
The CXD3605R is a timing generator IC which
generates the timing pulses for performing frame
readout using the ICX406 CCD image sensor.
Features
Base oscillation frequency 36MHz
High-speed/low-speed shutter function
Supports draft (octuple speed)/AF(auto focus) drive
Horizontal driver for CCD image sensor
Vertical driver for CCD image sensor
Applications
Digital still cameras
Structure
Silicon gate CMOS IC
Applicable CCD Image Sensors
ICX406 (Type 1/1.8, 3980K pixels)
Pin Configuration
Absolute Maximum Ratings
Supply voltage
V
DD
V
L
V
H
V
I
V
O1
V
O2
V
O3
V
SS
– 0.3 to +7.0
–10.0 to V
SS
V
L
– 0.3 to +26.0
V
SS
– 0.3 to V
DD
+ 0.3 V
V
SS
– 0.3 to V
DD
+ 0.3 V
V
L
– 0.3 to V
SS
+ 0.3
V
L
– 0.3 to V
H
+ 0.3
V
V
V
Input voltage
Output voltage
V
V
Operating temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–55 to +150
°C
Recommended Operating Conditions
Supply voltage
V
DD
b
V
DD
a, V
DD
c, V
DD
d
V
M
V
H
V
L
Operating temperature
Topr
3.0 to 5.25
3.0 to 3.6
0.0
14.55 to 15.45
–7.0 to –8.0
V
V
V
V
V
–20 to +75
°C
Groups of pins enclosed in the figure indicate
sections for which power supply separation is
possible.
– 1 –
E00Z48
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXD3605R
48 pin LQFP (Plastic)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
H2
V
DD
3
V
DD
4
XSHP
XSHD
XRS
PBLK
CLPDM
V
SS
4
OBCLP
ADCLK
V
SS
5
C
C
O
O
V
D
5
M
S
S
S
V
H
V
S
6
H
V
S
3
V
S
2
R
V
D
2
S
V
D
1
W
I
S
R
V
S
1
TEST2
SUB
V3B
VL
V3A
V1B
VH
V1A
V4
V2
VM
TEST1
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