參數(shù)資料
型號(hào)： CXD3408
廠商： Sony Corporation
英文描述： Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
中文描述： 時(shí)序發(fā)生器和幀讀出CCD圖像傳感器信號(hào)處理器
文件頁(yè)數(shù)： 23/47頁(yè)
文件大?。?/td> 404K
代理商： CXD3408
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23
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CXD3408GA
Detailed Description of Each Data
Shared data: D08 , D09 CTG [Category]
Of the data provided to the CXD3408GA by the serial interface, the CXD3408GA loads D10 and subsequent
data to each data register as shown in the table below according to the combination of D08 and D09 .
D09
0
0
1
D08
0
1
X
Description of operation
Loading to control data register
Loading to shutter data register
Test mode
D11
0
0
1
1
D12
0
0
0
0
D10
0
1
0
1
D11
0
0
1
1
D12
1
1
1
1
D10
0
1
0
1
Description of operation
Description of operation
Draft mode (default)
AF1 mode
AF2 mode
Frame mode
Draft mode
Frame mode (A field read out)
Frame mode (B field read out)
Test mode
Note that the CXD3408GA can apply these categories consecutively within the same vertical period. However,
care should be taken as the data is overwritten if the same category is applied.
Control data: D10 to D12 MODE [Drive mode]
The CXD3408GA timing generator block drive mode can be switched as follows. However, the drive mode bits
are located to the CXD3408GA and reflected at the falling edge of VD.
Draft mode is the pulse eliminator drive mode called octuple speed mode in the ICX406. This is a high frame
rate drive mode that can be used for purposes such as monitoring and auto focus (AF).
AF1 and AF2 modes are the pulse eliminator drive modes called by the same names in the ICX406. These
drive modes are based on draft mode, and are used to increase the frame rate for auto focus (AF). In these
modes, the screen is swept in the vertical direction and the center portion lines are cut out.
Frame mode is the ICX406 drive mode in which the data for all lines are read. This drive mode is comprised of
A and B Fields, so when it is established, repeated drive is performed in the manner of A
→
B
→
A
→
and so
on.
Frame mode (A or B Field) is the drive mode in which each field can be specified separately.
Control data: D17 NTPL [SSG function switching]
The CXD3408GA internal SSG output pattern can be switched as follows. However, the SSG function switching
bits are loaded to the CXD3408GA and reflected at the falling edge of VD.
D17
0
1
Description of Operation
NTSC equivalent pattern output
PAL equivalent pattern output
VD period in each pattern is defined as follows.
See the Timing Charts for the actual operation.
NTSC equivalent pattern
PAL equivalent pattern
Frame mode
1012H + 1672ck
944H + 464ck
Draft mode
224H + 1372ck
×
2
269H + 2039ck
AF1 mode
112H + 1372ck
134H + 2354ck
AF2 mode
56H + 686ck
67H + 1178ck
相關(guān)PDF資料
PDF描述
CXD3408GA Silver Mica Capacitor; Capacitance:30000pF; Capacitance Tolerance:+/- 5%; Series:CD42; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:27mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
CXD3412 Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
CXD3412GA Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
CXD3511 Digital Signal Driver/Timing Generator
CXD3511AQ Digital Signal Driver/Timing Generator
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXD3408GA 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
CXD3410 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
CXD3410GA 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
CXD3412 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
CXD3412GA 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator and Signal Processor for Frame Readout CCD Image Sensor
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