參數(shù)資料
型號(hào): CXD3029R
廠商: Sony Corporation
英文描述: Silver Mica Capacitor; Capacitance:25000pF; Capacitance Tolerance:+/- 5%; Series:CD42; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:27mm; Leaded Process Compatible:No RoHS Compliant: No
中文描述: CD數(shù)字信號(hào)處理器,具有內(nèi)置數(shù)字伺服防震內(nèi)存控制器數(shù)字高
文件頁(yè)數(shù): 52/201頁(yè)
文件大?。?/td> 2424K
代理商: CXD3029R
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52
CXD3029R
Description of level meter mode
(see Timing Chart 1-4.)
When the LSI is set to this mode, it performs digital level meter functions.
When the 96-bit clock is input to SQCK, 96 bits of data are output to SQSO.
The initial 80 bits are subcode-Q data (see "[2] Subcode Interface"). The last 16 bits are LSB first, which are
15-bit PCM data (absolute values) and an L/R flag.
The final bit (L/R flag) is high when the 15-bit PCM data is from the left channel and low when the data is
from the right channel.
The PCM data is reset and the L/R flag is inverted after one readout.
Then the measurement for the maximum value continues until the next readout.
Description of peak meter mode
(see Timing Chart 1-5.)
When the LSI is set to this mode, the maximum PCM data value is detected regardless of if it comes from the
left or right channel.
The 96-bit clock must be input to SQCK to read out this data.
When the 96-bit clock is input, 96 bits of data are output to SQSO and the value is set in the LSI internal
register again.
In other words, the PCM maximum value register is not reset by the readout.
To reset the PCM maximum value register to "0", set PCT1 = PCT2 = 0 or set the $AX command Mute.
The subcode-Q absolute time is automatically controlled in this mode.
In other words, after the maximum value is generated, the absolute time for CRC to become OK is retained in
the memory. Normal operation is conducted for the relative time.
The final bit (L/R flag) of the 96-bit data is normally "0".
The pre-value hold and average value interpolation data are fixed to level (
) for this mode.
SENS output switching
This command is used to output the SQSO pin signal from the SENS pin.
When SOC2 = 0, SENS output is performed as usual.
When SOC2 = 1, the SQSO pin signal is output from the SENS pin.
At this time, the readout clock is input to the SCLK pin.
Note)
Perform the SOC2 switching when SQCK = SCLK = high.
Command bit
SOC2 = 0
SOC2 = 1
The SENS signal is output from the SENS pin as usual.
The SQSO pin signal is output from the SENS pin.
Processing
Command
Data 3
Data 4
Data 5
Data 6
D3
D2
D1
D0
D3
D2
D1
D0
D3
D2
D1
D0
D3
D2
D1
D0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
Audio CTRL
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