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參數(shù)資料
| 型號： | CXD2951GA-2 |
| 廠商： | Sony Corporation |
| 英文描述： | Single Chip GPS LSI |
| 中文描述： | 單芯片LSI的全球定位系統(tǒng) |
| 文件頁數(shù)： | 20/26頁 |
| 文件大?。?/td> | 299K |
| 代理商： | CXD2951GA-2 |
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CXD2951GA-2
Radio Block Operation
Radio block diagram shows RF section of the chip. The signal flow starts from the RFIN port (Pin 47). The
signal is amplified and mixed down to the first Intermediate Frequency (IF) of 2MHz with cosine and sine wave
quadrature mixers. Out of band images are filtered out and the signal is again mixed down to the 2nd IF of
1MHz with another set of quadrature mixers. The complex signal becomes real with the addition of real and
imaginary components. The image of the 2nd IF mixing is removed with the last Band Pass Filter (BPF). The
real signal is then amplified one last time and transferred to digital baseband processing unit.
To have constant internal frequencies for mixing and other purposes, the supplied TCXO frequency is counted
by a Real Time Clock (RTC), and the internal PLL divider is automatically set to provide correct frequency for
RF mixing and baseband operation.
The loop filters (RF and IF) are externally connected. Use parts that satisfy the required tolerance.
RF Digital
RF Analog
Reset
CLK
Data
PLLCLK
Enable
2nd IF (1MHz)
A/D Converter
1st IF (2MHz)
RFIN
RF Local
(1573MHz)
IF Local (3MHz)
LPFRF
LPFIF
B
BPF
BPF
BPF
VCO
PLL
BUF
TEST
BIAS
VCO
PLL
Radio Block Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CXD2951GA-4 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Single Chip GPS LSI |
| CXD2951GA-4-T6 | 制造商:SONY 功能描述: |
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| CXD3000R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
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