- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378985 > CXD2588Q (Sony Corporation) RESISTOR,MIL-PRF-39007/9 PDF資料下載
參數(shù)資料
| 型號： | CXD2588Q |
| 廠商： | Sony Corporation |
| 英文描述： | RESISTOR,MIL-PRF-39007/9 |
| 中文描述： | CD數(shù)字信號處理器，具有內(nèi)置數(shù)字伺服和DAC |
| 文件頁數(shù)： | 58/121頁 |
| 文件大?。?/td> | 986K |
| 代理商： | CXD2588Q |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁當(dāng)前第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁
– 58 –
CXD2588Q/R
§4. Description of Other Functions
§4-1. Channel Clock Regeneration by the Digital PLL Circuit
The channel clock is necessary for demodulating the EFM signal regenerated by the optical system.
Assuming T as the channel clock cycle, the EFM signal is modulated in an integer multiple of T from 3T to
11T. In order to read the information in the EFM signal, this integer value must be read correctly. As a result,
T, that is the channel clock, is necessary.
In an actual player, the PLL is necessary to regenerate the channel clock because the fluctuation in the
spindle rotation alters the width of the EFM signal pulses.
The block diagram of this PLL is shown in Fig. 4-1.
The CXD2588Q/R has a built-in three-stage PLL.
The first-stage PLL is for the wide-band PLL. When the internal VCO2 is used, an external LPF is necessary;
when not using the internal VCO2, external LPF and VCO are required.
The output of this first-stage PLL is used as a reference for all clocks within the LSI.
The second-stage PLL generates the high-frequency clock needed by the third-stage digital PLL.
The third-stage PLL is a digital PLL that regenerates the actual channel clock.
A new digital PLL has been provided for CLV-W mode to follow the rotational velocity of the disc in addition
to the conventional secondary loop.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD2588R | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2589Q | CD Digital Signal Processor |
| CXD2598Q | CD Digital Signal Processor with Built-in Digital Servo and DAC(數(shù)字式CD信號處理器（內(nèi)置數(shù)字式伺服系統(tǒng)和D/A轉(zhuǎn)換器）) |
| CXD2598 | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2719Q | Single-Chip Dolby Pro Logic Surround Decoder(單片杜比環(huán)繞邏輯譯碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2588Q/R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD Digital Signal Processor with Built-in DigitalServo and DAC |
| CXD2588R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2589Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor |
| CXD2597Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2598 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。