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參數(shù)資料
| 型號： | CXD1257AR |
| 廠商： | Sony Corporation |
| 英文描述： | CCD Camera Timing Generator |
| 中文描述： | CCD相機時序發(fā)生器 |
| 文件頁數(shù)： | 8/18頁 |
| 文件大小： | 666K |
| 代理商： | CXD1257AR |
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CXD1257AR
ED1 (CLK)
ED2 (DATA)
ED0 (STB)
D0
D1
D2
D3
D4
D5
D6
D7
D8
SMD1
SMD2
Dummy
ED2 data is latched to the register at the rise of ED1, and transferred to the within during the Low period of ED0.
3-2. serial input (PS = L)
For serial input (PS = L), SMD1 and SMD2 bits within ED2 (DATA) take priority over SMD1 (Pin 7) and SMD2
(Pin 9) pins as SMD1 and SMD2 (shutter mode control).
In this case, control by SMD1 and SMD2 pins is invalid.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CXD1261 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Sync Signal, Timing Signal Generator for CCD Cameras |
| CXD1261AR | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Sync Signal, Timing Signal Generator for CCD Cameras |
| CXD1261R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Timing Generator for CCD |
| CXD1265 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CCD Camera Timing Generator |
| CXD1265R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CCD Camera Timing Generator |
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