
10-bit 125MSPS D/A Converter
Description
The CXA3197R is a high-speed D/A converter
which can perform multiplexed input of two system
10-bit data.
This IC realizes a maximum conversion rate of
125MSPS. Multiplexed operation is possible by
inputing the 1/2 frequency-divided clock or by halving
the frequency of the clock internally with the clock
frequency divider circuit having the reset pin. The
data input is at TTL level, and the clock input and
reset input can select either TTL or PECL level
according to the application.
Features
Maximum conversion rate:
During PECL operation: 125MSPS
During TTL operation:
Resolution: 10 bits
Low power consumption: 480mW (typ.)
Data input level: TTL
Clock, reset input level: TTL and PECL compatible
2:1 multiplexed input function
1/2 frequency-divided clock output possible by the
built-in clock frequency divider circuit
Voltage output (50
load drive possible)
Single power supply or ±dual power supply operation
Reset signal polarity switching function
100MSPS
Pin Configuration
Structure
Bipolar silicon monolithic IC
Applications
LCD
DDS
HDTV
Communications (QPSK, QAM)
Measuring devices
– 1 –
E97639-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXA3197R
48 pin LQFP (Plastic)
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
36 35 34
31
32
33
40
39
38
37
41
42
43
44
45
46
47
48
2
3
4
5
6
7
8
9
10 11 12
1
D
D
D
D
D
(
(
D
D
D
D
D
A
C
2
V
V
A
A
A
C
O
A
D
C
2
C
C
C
D
DB3
DB2
DB1
DB0 (LSB)
DIV2IN
DIV2OUT
CLK/T
CLKP/E
CLKN/E
RESET/T
RESETP/E
RESETN/E
DA6
DA7
DA8
(MSB) DA9
DGND1
N.C.
DV
CC
1
PS
INV
R POLARITY
VOCLP
AGND2
LEAD TREATMENT: PALLADIUM PLATING