
DATA SHEET CX65002
Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 sales@skyworksinc.com www.skyworksinc.com
101467E Skyworks Proprietary and Confidential information Products and Product Information are Subject to Change Without Notice October 11, 2004
5
30
35
40
45
50
55
850
877.5
905
932.5
960
Freq (MHz)
OIP3
(dBm)
-40C
25C
85C
Figure 11. Typical OIP3 vs Frequency Over Temperature
(Circuit Match for Optimum OIP3)
-65
-60
-55
-50
-45
-40
10
12
14
16
18
20
22
24
Pout (dBm)
ACP
R
(dBc
)
Figure 12. Typical ACPR vs POUT @ 881.5 MHz, 750 kHz Offset,
25
°C (Circuit Match for Optimum ACPR)
Evaluation Board Description
Skyworks CX65002 Evaluation Board is used to test the
performance of the CX65002 power amplifier driver. An
Evaluation Board schematic diagram, optimized for the 3rd Order
Output Intercept Point (OIP3), is shown in Figure 13. A schematic
diagram optimized for Adjacent Channel Power Rejection (ACPR)
is provided in Figure 14. The Evaluation Board assembly diagram
is shown in Figure 15 and the Evaluation Board layer detail is
shown in Figure 16. The mounting footprint for the CX65002 is
shown in Figure 17.
Circuit Design Configurations
The following design considerations are general in nature and
must be followed regardless of final use or configuration.
1. Paths to ground should be made as short as possible.
2. The ground pad of the CX65002 power amplifier has special
electrical and thermal grounding requirements. This pad is the
main thermal conduit for heat dissipation. Since the circuit
board acts as the heat sink, it must shunt as much heat as
possible from the amplifier. As such, design the connection to
the ground pad to dissipate the maximum wattage produced
to the circuit board. Multiple vias to the grounding layer are
required.
NOTE: Junction temperature (TJ) of the device increases with a
poor connection to the slug and ground. This reduces the
lifetime of the device.
3. External bypass capacitors are required on the VCC line and
on pins 4, 5, and 8.
4. Bias resistor R1 is used to control the reference voltage of the
bias circuit (VCC1) at pin 8.
5. Inductor L2 is placed between the bias circuit output (pin 4)
and the base of the RF transistor (pin 2) for bias circuit and RF
transistor connection.
Suggested matching circuits are shown in Figures 13 and 14.
Testing Procedure
Use the following procedure to set up the CX65002 Evaluation
Board for testing. Refer to Figure 18 for guidance:
1. Connect a 5.0 V supply to VCC. If available, enable the current
limiting function of the power supply to 240 mA.
2. Connect a signal generator to the RF signal input port. Set it to
the desired RF frequency at a power level of –15 dBm or less
to the Evaluation Board but do NOT enable the RF signal.
3. Connect a spectrum analyzer to the RF signal output port.
4. Enable the power supply.
5. Enable the RF signal.
6. Take measurements.
CAUTION: If any of the input signals exceed the rated maximum
values, the CX65002 Evaluation Board can be
permanently damaged.