參數(shù)資料
型號: CT2566-FP
廠商: Aeroflex Inc.
英文描述: CT2566 MIL-STD-1553 to Microprocessor Interface Unit
中文描述: CT2566的MIL - STD - 1553的微處理器接口單元
文件頁數(shù): 10/37頁
文件大小: 326K
代理商: CT2566-FP
Aeroflex Circuit Technology
SCDCT2566 REV B 8/10/99 Plainview NY (516) 694-6700
10
INTERRUPT MASK REGISTER
This register is an eight bit read/write register used to enable the interrupt conditions. All interrupts are enabled
with a logic "1" (See Figure 9).
START/RESET REGISTER
Only two bits of this write only register are used, as illustrated in Figure 10.
15
4
3
2
1
0
1
1
1
1
1
1
1
NOT USED
BC EOM
FORMAT ERROR/STATUS SET
NOT USED
EOM
INTERRUPT
DEFINITION
EOM
End of Message. Set by CT2566 (during BC or RTU mode) every time a
1553 message is transferred (regardless of validity).
Set by CT2566 for these conditions:
Loop Test Failure:
Last transmitted word did not match received word.
Message Error:
Received message contained an address error, one of
eight 1553 status bits set, or 1553 specification violated (parity error,
Manchester error, etc).
Time-Out:
Expected transmission was not received during allotted time
Status Set:
Received status word contained status bit(s) set or address
error.
Bus Controller End of Message. Set by CT2566 (in BC mode) when all
messages have been transferred.
Figure 9 – Interrupt Mask Register
FORMAT ERROR/
STATUS SET
BC EOM
15
1
0
NOT USED
CONTROLLER START
RESET
BIT
DEFINITION
RESET
Issued by the CPU to place the CT2566 in the power-on condition;
Configuration, and Interrupt Mask registers are reset to logic “0”.
Issued by the CPU (BC mode) to start message transmission. The CPU
must first load the number of messages to transfer (256, max) in the
message count location of RAM (area A or B). Value is loaded in 1’s
complement (load FFFE to transmit one message). In MT mode it is
used to begin reception of 1553 messages. Issued by CPU in MT mode
to enable monitor operation.
CONTROLLER START
Figure 10 – Start/Reset Register
相關(guān)PDF資料
PDF描述
CT2577 APPLICATION NOTE #108
CT2579 APPLICATION NOTE #108
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