參數(shù)資料
型號: CT2554-FP
廠商: Aeroflex Inc.
英文描述: CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553
中文描述: CT2553 / 2554 /二千五百五十六分之二千五百五十五高級集成復用器(AIM)的混合的MIL - STD - 1553的
文件頁數(shù): 30/36頁
文件大?。?/td> 352K
代理商: CT2554-FP
Aeroflex Circuit Technology
30
SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700
A02
A01
A00
SSFLAG, SSBUSY, SVCRQST
DBAC, RTU/BC, MT, CTLIN B/A
MEM/REG
D15-D00
IOEN
SELECT
STRBD
(Internal)
16MHz Clock
RD/WR
READYD
See Note 1
DATA VALID
td1
tpw1
td2
td6
Figure 33 – CPU Reads from Internal Register Timing
CPU Reads from Internal Register
SYMBOL
DESCRIPTION
MIN
MAX
UNITS
td1
READYD low delay (CPU Handshake)
-
200
ns
td2
IOEN high delay (CPU Handshake)
-
20
ns
tpw1
READYD pulse width (CPU Handshake)
70
-
ns
td6
Internal Register delay (read)
-
60
ns
tr
READYD to STRBD release
-
1.37
μs
tz
(SELECT
STRBD) to IOEN
-
1.8
μs
See Note 2
tz
tr
NOTE:
1. STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
2. CPU must release STRBD within 1.5μs of IOEN going active. READYD will go away within one clock cycle maximum.
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CT2555-FP CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553
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