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12
User’s Manual U14260EJ3V1UD
3.2.18 IC (mask ROM version only) .....................................................................................................
Pin I/O Circuits and Recommended Connection of Unused Pins ...................................
47
48
3.3
CHAPTER 4 PIN FUNCTIONS (
μ
PD780078Y SUBSERIES) .........................................................
52
4.1
4.2
Pin Function List..................................................................................................................
Description of Pin Functions ..............................................................................................
4.2.1
P00 to P03 (Port 0) ...................................................................................................................
4.2.2
P10 to P17 (Port 1) ...................................................................................................................
4.2.3
P20 to P25 (Port 2) ...................................................................................................................
4.2.4
P30 to P36 (Port 3) ...................................................................................................................
4.2.5
P40 to P47 (Port 4) ...................................................................................................................
4.2.6
P50 to P57 (Port 5) ...................................................................................................................
4.2.7
P64 to P67 (Port 6) ...................................................................................................................
4.2.8
P70 to P75 (Port 7) ...................................................................................................................
4.2.9
P80 (Port 8)...............................................................................................................................
4.2.10 AV
REF
.........................................................................................................................................
4.2.11 AV
SS
..........................................................................................................................................
4.2.12 RESET ......................................................................................................................................
4.2.13 X1 and X2 .................................................................................................................................
4.2.14 XT1 and XT2 .............................................................................................................................
4.2.15 V
DD0
and V
DD1
............................................................................................................................
4.2.16 V
SS0
and V
SS1
............................................................................................................................
4.2.17 V
PP
(flash memory versions only) .............................................................................................
4.2.18 IC (mask ROM version only) .....................................................................................................
Pin I/O Circuits and Recommended Connection of Unused Pins ...................................
52
55
55
55
55
56
57
57
57
58
59
59
59
59
59
59
59
59
59
60
61
4.3
CHAPTER 5 CPU ARCHITECTURE................................................................................................
64
5.1
Memory Spaces....................................................................................................................
5.1.1
Internal program memory space ...............................................................................................
5.1.2
Internal data memory space .....................................................................................................
5.1.3
Special function register (SFR) area .........................................................................................
5.1.4
External memory space ............................................................................................................
5.1.5
Data memory addressing..........................................................................................................
Processor Registers ............................................................................................................
5.2.1
Control registers........................................................................................................................
5.2.2
General-purpose registers ........................................................................................................
5.2.3
Special function registers (SFR) ...............................................................................................
Instruction Address Addressing ........................................................................................
5.3.1
Relative addressing...................................................................................................................
5.3.2
Immediate addressing...............................................................................................................
5.3.3
Table indirect addressing ..........................................................................................................
5.3.4
Register addressing ..................................................................................................................
Operand Address Addressing ............................................................................................
5.4.1
Implied addressing ....................................................................................................................
5.4.2
Register addressing ..................................................................................................................
5.4.3
Direct addressing ......................................................................................................................
64
67
68
68
68
69
72
72
75
77
81
81
82
83
84
85
85
86
87
5.2
5.3
5.4