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參數(shù)資料
| 型號： | CS92288 |
| 英文描述： | Peripheral IC |
| 中文描述： | 外圍芯片 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大小： | 43K |
| 代理商： | CS92288 |
For more information, visit us at www.cirrus.com
CS92210
P R O D U C T B U L L E T I N
CS92210 Features
Single chip MPEG-2 Video CODEC
Supports real time MPEG-1 encoding and
decoding
Supports real time MPEG-2 MP@ML, SP@ML,
and MP@LL encoding and decoding
Support for constant and one-pass variable bit
rate
IPB-pictures, CBR or VBR to 15 Mbps
I-pictures only to 30 Mbps
Proprietary high performance motion estimation
Low external memory
8 Mbytes for full D1 (720) NTSC/PAL pictures
Provides complete video encoding and decoding
(half-duplex) when combined with system
function and supporting commodity devices
Direct interface to video modulator &
demodulator
Supports multiple resolutions & scan rates
NTSC: (720-D1, 704-D1, 640-VGA, 544, 480-
2/3D1, 352-1/2D1) x 480, or 352 x 240 (CIF),
320 x 240 (MPEG-1) or 176 x 112 (QCIF) at
30 or 29.97 Hz
PAL: (720-D1, 704-D1, 640-VGA, 544, 480-
2/3D1, 352-1/2D1) x 576, or 352 x 288
(CIS/SIF), or 176 x 144 (QCIF) at 25 Hz
Intel/Motorola 16-bit host interface
5 V I/O tolerance, 3.3 V and 1.8 V power
supplies
0.65 watts @ 87.75 MHz average power
consumption
256-pin PQFP package
MPEG-2 VIDEO Encoder/Decoder
The CS92210 is a real time MPEG-2 video encoder and decoder
(CODEC) that fully complies with the ISO/IEC-13818 Main
Profile@Main Level (MP@ML) format, Simple Profile@ Main Level
(SP@ML), and Main Profile @ Low Level (MP@LL).
In encode mode, the CS92210 accepts digital video in ITU-R BT.601
(CCIR-601) or ITU-R BT.656 (CCIR-656) format. The input is filtered
and then encoded to produce compressed bitstreams in MPEG-2
MP@ML syntax. In decode mode, CS92210 accepts an MPEG
bitstream, decodes it, and then filters the video output to produce
either ITU-R BT.601 or ITU-R BT.656 format digital video. Designed
for flexibility, the CS92210’s video interface supports multiple video
formats, resolutions, and frame rates including NTSC, PAL, and
FILM.
The CS92210’s versatile time-stamp feature enables flexible muxing
of audio and video elementary bit streams. Also, the CS92210 can
encode and decode bitstreams in both the VCD and SVCD formats.
The algorithmic and architectural innovations of the CS92210 enable
a high degree of integration while still providing exceptional video
quality over the widest range of bit rates. Also, the CS92210
provides ease of system design by interfacing to a wide variety of
commodity components such as Philips video decoders and
encoders, Flash and SDRAM memories.
Refinement &
Decision Unit (RDU)
DRAM Control
Unit (DCU)
Bitstream/
Intel/Motorola
16-Bit Host Interface
Bitstream/Generic
8-Bit Interface
8 MB SDRAM
Video I/O
Video Engine
Unit (VEU)
Microcontroller
RiSC Unit (MCU)
SYSCLK
Pre-process
Unit (PPU)
Post-process
Unit (POU)
Video Stream
Unit (VSU)
Motion Est.
Unit (MEU)
Host I/F Unit
(HIU)
DBUS
PLL
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS92-2M | 制造商:CENTRAL 制造商全稱:Central Semiconductor Corp 功能描述:SILICON CONTROLLED RECTIFIER 2.0 AMP, 600 THRU 800 VOLTS |
| CS92-2N | 制造商:CENTRAL 制造商全稱:Central Semiconductor Corp 功能描述:SILICON CONTROLLED RECTIFIER 2.0 AMP, 600 THRU 800 VOLTS |
| CS9233 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CS9236 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:SINGLE-CHIP WAVETABLE MUSIC SYNTHESIZER |
| CS9236-CL | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:SINGLE-CHIP WAVETABLE MUSIC SYNTHESIZER |
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