參數(shù)資料
型號(hào)： CS8416-CNZ
廠商： Cirrus Logic Inc
文件頁(yè)數(shù)： 24/37頁(yè)
文件大?。?/td> 0K
描述： IC RCVR DGTL 192KHZ 28QFN COMM
標(biāo)準(zhǔn)包裝： 490
類型： 數(shù)字音頻接口接收器
應(yīng)用： 數(shù)字音頻
安裝類型： 表面貼裝
封裝/外殼： 28-QFN
供應(yīng)商設(shè)備封裝： 28-QFN 裸露焊盤（5x5）
包裝： 管件
產(chǎn)品目錄頁(yè)面： 759 (CN2011-ZH PDF)
配用： 598-1017-ND - BOARD EVAL FOR CS8416 RCVR
其它名稱： 598-1723
30
DS578F3
CS8416
10.ERROR AND STATUS REPORTING
10.1 General
While decoding the incoming bi-phase encoded data stream, the CS8416 has the ability to identify various
error conditions.
10.1.1 Software Mode
Software Mode allows the most flexibility in reading errors. When unmasked, bits in the Receiver Error
register (0Ch) indicate the following errors:
1. QCRC – CRC error in Q subcode data.
2. CCRC – CRC error in channel status data.
3. UNLOCK – PLL is not locked to incoming data stream.
4. V – Data Validity bit is set.
5. CONF – The logical OR of UNLOCK and BIP. The input data stream may be near error condition due
to jitter degradation.
6. BIP – Biphase encoding error.
7. PAR – Parity error in incoming data.
The error bits are “sticky,” meaning that they are set on the first occurrence of the associated error and
will remain set until the user reads the register through the control port. This enables the register to log all
unmasked errors that occurred since the last time the register was read.
As a result of the bits “stickiness,” it is necessary to perform two reads on these registers to see if the error
condition still exists.
The Receiver Error Mask register (06h) allows masking of individual errors. The bits in this register default
to 00h and serve as masks for the corresponding bits of the Receiver Error register. If a mask bit is set to
1, the error is unmasked, which implies the following: its occurrence will be reported in the receiver error
register, induce a pulse on RERR, invoke the occurrence of a RERR interrupt, and affect the current audio
sample according to the status of the HOLD bits. The exceptions are the QCRC and CCRC errors, which
do not affect the current audio sample, even if unmasked.
The HOLD bits allow a choice of:
Holding the previous sample
Replacing the current sample with zero (mute)
OR
Not changing the current audio sample
10.1.2 Hardware Mode
In Hardware Mode, the user may only choose between Non-Validity Receiver Error (NVERR) or Receiver
Error (RERR) by pulling the NV/RERR pin low or high, respectively. The pull-up/pull-down condition will
be sensed on start-up, and the appropriate error reporting will be set.
RERR – The previous audio sample is held and passed to the serial audio output port if the validity bit is
high, or a parity, bi-phase, confidence or PLL lock error occurs during the current sample.
NVERR – The previous audio sample is held and passed to the serial audio output port if a parity, bi-
phase, confidence or PLL lock error occurs during the current sample.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS8416-CNZ 制造商:Cirrus Logic 功能描述:Receiver IC RoHS Compliant:Yes
CS8416-CNZR 功能描述:音頻發(fā)送器、接收器、收發(fā)器 IC 192 kHz Digital Audio Receiver RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝:
CS8416-CS 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:192 kHZ DIGITAL AUDIO INTERFACE RECEIVER
CS8416-CSR 制造商:Cirrus Logic 功能描述:- Tape and Reel
CS8416CSZ 制造商:Cirrus Logic 功能描述:
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