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參數(shù)資料
| 型號(hào)： | CS8413-CS |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 96 KHZ DIGITAL AUDIO RECEIVER |
| 中文描述： | 96 kHz的數(shù)字音頻接收器 |
| 文件頁數(shù)： | 21/38頁 |
| 文件大?。?/td> | 646K |
| 代理商： | CS8413-CS |
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CS8413 CS8414
28
DS240F1
Audio Output Interface
SCK - Serial Clock, PIN 12.
Serial clock for SDATA pin which can be configured (via control register 2) as an input or
output, and can sample data on the rising or falling edge. As an input, SCK must contain 32
clocks for every audio sample in all normal audio serial port formats.
FSYNC - Frame Sync, PIN 11.
Delineates the serial data and may indicate the particular channel, left or right. Also, FSYNC
may be configured as an input or output. The format is based on bits in control register 2.
SDATA - Serial Data, PIN 26.
Audio data serial output pin.
ERF - Error Flag, PIN 25.
Signals that an error has occurred while receiving the audio sample currently being read from
the serial port. The errors that cause ERF to go high are enumerated in status register 2 and
enabled by setting the corresponding bit in IEnable register 2.
A4/FCK - Address Bus Bit 4/Frequency Clock, PIN 13.
This pin has a dual function and is controlled by the FCEN bit in control register 1. A4 is the
address bus pin as defined below. When used as FCK, an internal frequency comparator
compares a 6.144 MHz clock input on this pin to the received clock frequency and stores the
value in status register 1 as three FREQ bits. These bits indicate the incoming frequency. When
defined as FCK, A4 is internally set to 0.
Parallel Interface
CS - Chip Select, PIN 24.
This input is active low and allows access to the 32 bytes of internal memory. The address bus
and RD/WR must be valid while CS is low.
RD/WR - Read/Write, PIN 23.
If RD/WR is low when CS goes active (low), the data on the data bus is written to internal
memory. If RD/WR is high when CS goes active, the data in the internal memory is placed on
the data bus.
A4-A0 - Address Bus, PINS 13, 15-18.
Parallel port address bus that selects the internal memory location to be read from or written to.
Note that A4 is the dual function pin A4/FCK as described above.
D0-D7 - Data Bus, PINS 27-28, 1-6.
Parallel port data bus used to check status, read or write control words, or read internal buffer
memory.
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| CS8414-CS | 96 KHZ DIGITAL AUDIO RECEIVER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS8413-CSR | 功能描述:音頻 DSP IC 96 kHz Digital Audio Receivers RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| CS8414 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:96 KHZ DIGITAL AUDIO RECEIVER |
| CS8414CS | 制造商:CRYS 功能描述: 制造商:The Cherry Corporation 功能描述: |
| CS8414-CS | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cirrus Logic 功能描述: |
| CS8414-CSR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cirrus Logic 功能描述: |
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