j x 45o D3 B
參數(shù)資料
型號: CS82C54Z96
廠商: Intersil
文件頁數(shù): 14/22頁
文件大?。?/td> 0K
描述: IC OSC PROG TIMER 8MHZ 28PLCC
標(biāo)準(zhǔn)包裝: 1
類型: 可編程計(jì)時(shí)器
頻率: 8MHz
電源電壓: 4.5 V ~ 5.5 V
電流 - 電源: 10mA
工作溫度: 0°C ~ 70°C
封裝/外殼: 28-LCC(J 形引線)
包裝: 標(biāo)準(zhǔn)包裝
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
安裝類型: 表面貼裝
產(chǎn)品目錄頁面: 1236 (CN2011-ZH PDF)
其它名稱: CS82C54Z96DKR
21
82C54
Ceramic Leadless Chip Carrier Packages (CLCC)
D
j x 45o
D3
B
h x 45o
A
A1
E
L
L3
e
B3
L1
D2
D1
e1
E2
E1
L2
PLANE 2
PLANE 1
E3
B2
0.010
E H
S
0.010
E F
S
-E-
0.007
E F
M
S HS
B1
-H-
-F-
J28.A MIL-STD-1835 CQCC1-N28 (C-4)
28 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.060
0.100
1.52
2.54
6, 7
A1
0.050
0.088
1.27
2.23
-
B
----
-
B1
0.022
0.028
0.56
0.71
2, 4
B2
0.072 REF
1.83 REF
-
B3
0.006
0.022
0.15
0.56
-
D
0.442
0.460
11.23
11.68
-
D1
0.300 BSC
7.62 BSC
-
D2
0.150 BSC
3.81 BSC
-
D3
-
0.460
-
11.68
2
E
0.442
0.460
11.23
11.68
-
E1
0.300 BSC
7.62 BSC
-
E2
0.150 BSC
3.81 BSC
-
E3
-
0.460
-
11.68
2
e
0.050 BSC
1.27 BSC
-
e1
0.015
-
0.38
-
2
h
0.040 REF
1.02 REF
5
j
0.020 REF
0.51 REF
5
L
0.045
0.055
1.14
1.40
-
L1
0.045
0.055
1.14
1.40
-
L2
0.075
0.095
1.90
2.41
-
L3
0.003
0.015
0.08
0.038
-
ND
7
3
NE
7
3
N28
28
3
Rev. 0 5/18/94
NOTES:
1. Metallized castellations shall be connected to plane 1 terminals
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
2. Unless otherwise specified, a minimum clearance of 0.015 inch
(0.38mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
4. The required plane 1 terminals and optional plane 2 terminals (if
used) shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Dimension “A” controls the overall package thickness. The maxi-
mum “A” dimension is package height before being solder dipped.
8. Dimensioning and tolerancing per ANSI Y14.5M-1982.
9. Controlling dimension: INCH.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS82C54Z96S2463 制造商:Intersil Corporation 功能描述:
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CS82C55A-5 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PERIPH PRG-I/O 5V 5MHZ 44PLCC COM RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
CS82C55A-596 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI PERIPH PRG-I/O 5V 5MHZ 44PLCC COMEL RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
CS82C55A-596S2497 制造商:Harris Corporation 功能描述: