參數(shù)資料
型號(hào)： CS61584A-IQ5Z
廠商： CIRRUS LOGIC INC
元件分類： 數(shù)字傳輸電路
英文描述： DUAL T1/E1 LINE INTERFACE
中文描述： DATACOM, PCM TRANSCEIVER, PQFP64
封裝： LEAD FREE, MS-022, LQFP-64
文件頁(yè)數(shù)： 1/54頁(yè)
文件大?。?/td> 1010K
代理商： CS61584A-IQ5Z
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1
(All Rights Reserved)
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
Features
l
Dual T1/E1 Line Interface
l
3.3 Volt and 5 Volt Versions
l
Crystal
-
less Jitter Attenuator Meets
European CTR 12 and ETSI ETS 300 011
Specifications
l
Matched Impedance Transmit Drivers
l
Transmitter Tri
-
state Capability
l
Common Transmit and
ReceiveTransformers for all Modes
l
Serial and Parallel Host Mode Operation
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User-
c
ustomizable Pulse Shapes
l
Supports JTAG Boundary Scan
l
Compliant with:
– ITU-T Recommendations: G.703, G.704,
G.706, G.732, G.775 and I.431
– American National Standards (ANSI): T1.102,
T1.105, T1.403, T1.408, and T1.231
– FCC Rules and Regulations: Part 68 and Part
15
– AT&T Publication 62411
– ETSI ETS 300 011, 300 233, CTR 12, TBR 13
l
TR-NET-00499
Description
The CS61584A is a dual line interface for T1/E1 appli-
cations, designed for high-volume cards where low
power and high density are required. The device is op-
timized for flexible microprocessor control through a
serial or parallel Host mode interface. Hardware mode
operation is also available.
Matched impedance drivers reduce power consumption
and provide substantial transmitter return loss. The
transmitter pulse shapes are customizable to allow non-
standard line loads. Crystalless jitter attenuation com-
plies with most stringent standards. Support of JTAG
boundary scan enhances system testability and
reliability.
S
ee
page 53
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CS61584A-IL5:5.0V, 68-pin PLCC, -40 to +85° C
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CS61584-IL5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Line Interface
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